From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 9735 invoked by alias); 30 Jun 2009 13:21:31 -0000 Received: (qmail 9687 invoked by uid 48); 30 Jun 2009 13:21:18 -0000 Date: Tue, 30 Jun 2009 13:21:00 -0000 Message-ID: <20090630132118.9686.qmail@sourceware.org> X-Bugzilla-Reason: CC References: Subject: [Bug middle-end/27016] ARM optimizer produces severely suboptimal code In-Reply-To: Reply-To: gcc-bugzilla@gcc.gnu.org To: gcc-bugs@gcc.gnu.org From: "steven at gcc dot gnu dot org" Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2009-06/txt/msg02218.txt.bz2 ------- Comment #4 from steven at gcc dot gnu dot org 2009-06-30 13:21 ------- The auto-inc-dec pass fails because the store and the reg increment are not in the same basic block. The dump of the pass before auto-inc-dec (reginfo) looks like this: ;; Function testme (testme) 74 NOTE_INSN_BASIC_BLOCK 72 NOTE_INSN_FUNCTION_BEG 76 r205:SI=`code_in_ram' 73 r203:SI=`_ram_erase_sector_start' 87 r208:SI=`_ram_erase_sector_end' L86: 79 NOTE_INSN_BASIC_BLOCK 80 r206:SI=[r203:SI] 81 [r205:SI-0x4]=r206:SI REG_DEAD: r206:SI 82 r203:SI=r203:SI+0x4 L83: 84 NOTE_INSN_BASIC_BLOCK 85 r205:SI=r205:SI+0x4 88 cc:CC=cmp(r203:SI,r208:SI) REG_EQUAL: cmp(r203:SI,`_ram_erase_sector_end') 89 pc={(ltu(cc:CC,0x0))?L86:pc} REG_DEAD: cc:CC REG_BR_PROB: 0x238c 92 NOTE_INSN_BASIC_BLOCK Then auto-inc-dec comes along and notices the opportunity to merge the load and increment in insns 80 and 82: starting bb 3 82 r203:SI=r203:SI+0x4 81 [r205:SI-0x4]=r206:SI REG_DEAD: r206:SI 81 [r205:SI-0x4]=r206:SI REG_DEAD: r206:SI found mem(81) *(r[205]+-4) 80 r206:SI=[r203:SI] 80 r206:SI=[r203:SI] found mem(80) *(r[203]+0) 82 r203:SI=r203:SI+0x4 found post inc(82) r[203]+=4 trying SIMPLE_POST_INC rescanning insn with uid = 80. deleting insn with uid = 80. deleting insn with uid = 82. ****success 80 r206:SI=[r203:SI++] REG_INC: r203:SI Merging the store and increment of insns 81 and 85 is never tried because the insns are not in the same basic block. Bernd Schmidt has patches that probably address this case of insns in different basic blocks. I will give his patches a try to see if it helps for ARM (the patches were written for Blackfin). -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27016