[Bug target/40730] redundant memory load

["carrot at google dot com" <gcc-bugzilla@gcc.gnu.org>]

------- Comment #4 from carrot at google dot com  2009-07-14 09:14 -------
In TREE level, the two stores are different statements. Only after register
allocation, the two stores get same register and make the load redundant.

try_crossjump_bb tries to find same instruction sequence in all predecessors of
a basic block bb, and move that code sequence to head of bb. It is triggered by
this function, and the store is moved just before the load.

I tried -fgcse-las but it couldn't do the work.

(In reply to comment #2)
> -fgcse-las should do the trick.  Note that PRE would do this kind of
> optimization on the tree-level, but it is disabled with -Os (so is gcse).
> 
> <bb 2>:
>   D.1614_2 = p2_1(D)->front;
>   p1_3(D)->head = D.1614_2;
>   goto <bb 4>;
> 
> <bb 3>:
>   D.1616_8 = D.1615_4->next;
>   p1_3(D)->head = D.1616_8;
> 
> <bb 4>:
>   D.1615_4 = p1_3(D)->head;
> 


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40730