From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 10312 invoked by alias); 14 Jul 2009 09:14:21 -0000 Received: (qmail 10276 invoked by uid 48); 14 Jul 2009 09:14:06 -0000 Date: Tue, 14 Jul 2009 09:14:00 -0000 Message-ID: <20090714091406.10275.qmail@sourceware.org> X-Bugzilla-Reason: CC References: Subject: [Bug target/40730] redundant memory load In-Reply-To: Reply-To: gcc-bugzilla@gcc.gnu.org To: gcc-bugs@gcc.gnu.org From: "carrot at google dot com" Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2009-07/txt/msg01079.txt.bz2 ------- Comment #4 from carrot at google dot com 2009-07-14 09:14 ------- In TREE level, the two stores are different statements. Only after register allocation, the two stores get same register and make the load redundant. try_crossjump_bb tries to find same instruction sequence in all predecessors of a basic block bb, and move that code sequence to head of bb. It is triggered by this function, and the store is moved just before the load. I tried -fgcse-las but it couldn't do the work. (In reply to comment #2) > -fgcse-las should do the trick. Note that PRE would do this kind of > optimization on the tree-level, but it is disabled with -Os (so is gcse). > > : > D.1614_2 = p2_1(D)->front; > p1_3(D)->head = D.1614_2; > goto ; > > : > D.1616_8 = D.1615_4->next; > p1_3(D)->head = D.1616_8; > > : > D.1615_4 = p1_3(D)->head; > -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40730