From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 18679 invoked by alias); 16 Nov 2009 17:35:29 -0000 Received: (qmail 17854 invoked by uid 48); 16 Nov 2009 17:35:14 -0000 Date: Mon, 16 Nov 2009 17:35:00 -0000 Message-ID: <20091116173514.17853.qmail@sourceware.org> X-Bugzilla-Reason: CC References: Subject: [Bug target/40836] ICE: "insn does not satisfy its constraints" (iwmmxt_movsi_insn) In-Reply-To: Reply-To: gcc-bugzilla@gcc.gnu.org To: gcc-bugs@gcc.gnu.org From: "rearnsha at gcc dot gnu dot org" Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2009-11/txt/msg01319.txt.bz2 ------- Comment #14 from rearnsha at gcc dot gnu dot org 2009-11-16 17:35 ------- This is probably a consequence of some changes made to support Thumb-2. Only a very limited number of instructions are permitted to modify SP there, and co-processor operations are not amongst them. I think the correct way to solve this is to add a secondary reload pattern that handles moving co-processor regs to STACK_REGS (and vice-versa). -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40836