[Bug rtl-optimization/42592] New: really bad register allocation for x86

[Bug rtl-optimization/42592] New: really bad register allocation for x86

[andi-gcc at firstfloor dot org]

>From http://embed.cs.utah.edu/embarrassing/dec_09/harvest/gcc-head_icc-11.1/

typedef unsigned int size_t;
typedef __builtin_va_list __gnuc_va_list;
typedef __gnuc_va_list va_list;
typedef size_t STRLEN;
struct sv;
typedef struct sv SV;
typedef int I32;
typedef unsigned int U32;
struct sv
{
  void *sv_any;
  U32 sv_refcnt;
  U32 sv_flags;
};
void Perl_sv_setpvn (SV * sv, char const *ptr, STRLEN len);
void Perl_sv_vcatpvfn (SV * sv, char const *pat, STRLEN patlen,
                       va_list * args, SV ** svargs, I32 svmax,
                       char *maybe_tainted);
void Perl_sv_vsetpvfn (SV * sv, char const *pat, STRLEN patlen,
                       va_list * args, SV ** svargs, I32 svmax,
                       char *maybe_tainted);
void Perl_sv_vcatpvfn (SV * sv, char const *pat, STRLEN patlen,
                       va_list * args, SV ** svargs, I32 svmax,
                       char *maybe_tainted);
void Perl_sv_vcatpvfn (SV * sv, char const *pat, STRLEN patlen,
                       va_list * args, SV ** svargs, I32 svmax,
                       char *maybe_tainted);
void Perl_sv_setpvn (SV * sv, char const *ptr, STRLEN len);
void
Perl_sv_vsetpvfn (SV * sv, char const *pat, STRLEN patlen, va_list * args,
                  SV ** svargs, I32 svmax, char *maybe_tainted)
{

  {
    Perl_sv_setpvn (sv, "", 0U);
    Perl_sv_vcatpvfn (sv, pat, patlen, args, svargs, svmax, maybe_tainted);
    return;
  }
}

/* Checksum = 9EEF59B7 */

with icc this gives a neat

   0:   57                      push   %edi
   1:   8b 7c 24 08             mov    0x8(%esp),%edi
   5:   6a 00                   push   $0x0
   7:   68 00 00 00 00          push   $0x0
   c:   57                      push   %edi
   d:   e8 fc ff ff ff          call   e <Perl_sv_vsetpvfn+0xe>
  12:   ff 74 24 2c             pushl  0x2c(%esp)
  16:   ff 74 24 2c             pushl  0x2c(%esp)
  1a:   ff 74 24 2c             pushl  0x2c(%esp)
  1e:   ff 74 24 2c             pushl  0x2c(%esp)
  22:   ff 74 24 2c             pushl  0x2c(%esp)
  26:   ff 74 24 2c             pushl  0x2c(%esp)
  2a:   57                      push   %edi
  2b:   e8 fc ff ff ff          call   2c <Perl_sv_vsetpvfn+0x2c>
  30:   83 c4 28                add    $0x28,%esp
  33:   5f                      pop    %edi
  34:   c3                      ret    

but gcc produces terrible register allocation (-m32 -O2 4.5.0 20091219)
in comparison (like first loading arguments into registers, just to spill
them again on a function call):

        pushl   %ebp
        movl    %esp, %ebp
        pushl   %edi
        pushl   %esi
        pushl   %ebx
        subl    $32, %esp
        movl    12(%ebp), %eax
        movl    8(%ebp), %ebx
        movl    28(%ebp), %edx
        movl    32(%ebp), %ecx
        movl    %eax, -28(%ebp)
        movl    24(%ebp), %eax
        pushl   $0
        movl    16(%ebp), %esi
        pushl   $.LC0
        movl    20(%ebp), %edi
        pushl   %ebx
        movl    %eax, -32(%ebp)
        movl    %edx, -36(%ebp)
        movl    %ecx, -40(%ebp)
        call    Perl_sv_setpvn
        movl    -32(%ebp), %eax
        addl    $16, %esp
        movl    -40(%ebp), %ecx
        movl    -36(%ebp), %edx
        movl    %edi, 20(%ebp)
        movl    %eax, 24(%ebp)
        movl    -28(%ebp), %eax
        movl    %esi, 16(%ebp)
        movl    %ebx, 8(%ebp)
        movl    %ecx, 32(%ebp)
        movl    %edx, 28(%ebp)
        movl    %eax, 12(%ebp)
        leal    -12(%ebp), %esp
        popl    %ebx
        popl    %esi
        popl    %edi
        popl    %ebp
        jmp     Perl_sv_vcatpvfn


-- 
           Summary: really bad register allocation for x86
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: andi-gcc at firstfloor dot org
  GCC host triplet: x86_64-linux
GCC target triplet: x86_64-linux


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42592

[Bug rtl-optimization/42592] really bad register allocation for x86

[rguenth at gcc dot gnu dot org]

------- Comment #1 from rguenth at gcc dot gnu dot org  2010-01-03 11:27 -------
Confirmed.  Well, GCC produces exactly the same code as ICC when using
-O2 -mno-accumulate-outgoing-args -fno-optimize-sibling-calls
-fomit-frame-pointer

Thus the sibcall comes in the way as obviously does -maccumulate-outgoing-args.
w/o -maccumulate-outgoing-args but the rest of the options we produce

Perl_sv_vsetpvfn:
        pushl   %ebx
        subl    $40, %esp
        movl    48(%esp), %ebx
        movl    $0, 8(%esp)
        movl    $.LC0, 4(%esp)
        movl    %ebx, (%esp)
        call    Perl_sv_setpvn
        movl    72(%esp), %eax
        movl    %ebx, (%esp)
        movl    %eax, 24(%esp)
        movl    68(%esp), %eax
        movl    %eax, 20(%esp)
        movl    64(%esp), %eax
        movl    %eax, 16(%esp)
        movl    60(%esp), %eax
        movl    %eax, 12(%esp)
        movl    56(%esp), %eax
        movl    %eax, 8(%esp)
        movl    52(%esp), %eax
        movl    %eax, 4(%esp)
        call    Perl_sv_vcatpvfn
        addl    $40, %esp
        popl    %ebx
        ret

which looks like we cannot do better with that constraint.  The sibcall
variant isn't too bad either.

Of course with sibcalling and -mno-accumulate-outgoing-args we fail to
re-order argument setup for optimal size, even with -fschedule-insns.
So that part of the bug would be valid.


-- 

rguenth at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |vmakarov at redhat dot com
           Severity|normal                      |enhancement
             Status|UNCONFIRMED                 |NEW
     Ever Confirmed|0                           |1
           Keywords|                            |missed-optimization, ra
   Last reconfirmed|0000-00-00 00:00:00         |2010-01-03 11:27:29
               date|                            |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42592

[Bug rtl-optimization/42592] really bad register allocation for x86

[andi-gcc at firstfloor dot org]

------- Comment #2 from andi-gcc at firstfloor dot org  2010-01-03 15:40 -------
An obvious improvement would be to use the non callee clobbered registers
as temporal storage, instead of putting into registers that just get spilled
again. I think one of the other compilers in the comparison
did that but I can't find the example right now.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42592