From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 1417 invoked by alias); 3 Jan 2010 15:40:29 -0000 Received: (qmail 568 invoked by uid 48); 3 Jan 2010 15:40:13 -0000 Date: Sun, 03 Jan 2010 15:40:00 -0000 Message-ID: <20100103154013.566.qmail@sourceware.org> X-Bugzilla-Reason: CC References: Subject: [Bug rtl-optimization/42592] really bad register allocation for x86 In-Reply-To: Reply-To: gcc-bugzilla@gcc.gnu.org To: gcc-bugs@gcc.gnu.org From: "andi-gcc at firstfloor dot org" Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2010-01/txt/msg00282.txt.bz2 ------- Comment #2 from andi-gcc at firstfloor dot org 2010-01-03 15:40 ------- An obvious improvement would be to use the non callee clobbered registers as temporal storage, instead of putting into registers that just get spilled again. I think one of the other compilers in the comparison did that but I can't find the example right now. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42592