[Bug middle-end/42972] Very bad bit field code

["matz at gcc dot gnu dot org" <gcc-bugzilla@gcc.gnu.org>]

------- Comment #5 from matz at gcc dot gnu dot org  2010-02-05 15:36 -------
The code for the if() looks sane on x86-64:
-----------------------------------------
;; if (D.2729_8 != 0)

(insn 16 15 17 pr42972.c:10 (set (reg:QI 87)
        (mem/s:QI (reg/f:DI 82 [ D.2727 ]) [0 S1 A32])) -1 (nil))

(insn 17 16 18 pr42972.c:10 (parallel [
            (set (reg:QI 86)
                (and:QI (reg:QI 87)
                    (const_int 1 [0x1])))
            (clobber (reg:CC 17 flags))
        ]) -1 (expr_list:REG_EQUAL (and:QI (mem/s:QI (reg/f:DI 82 [ D.2727 ])
                                            [0 S1 A32])
            (const_int 1 [0x1]))
        (nil)))

(insn 18 17 19 pr42972.c:10 (set (reg:CCZ 17 flags)
        (compare:CCZ (reg:QI 86)
            (const_int 0 [0x0]))) -1 (nil))

(jump_insn 19 18 0 pr42972.c:10 (set (pc)
        (if_then_else (eq (reg:CCZ 17 flags)
                (const_int 0 [0x0]))
            (label_ref 0)
            (pc))) -1 (expr_list:REG_BR_PROB (const_int 5000 [0x1388])
        (nil)))
---------------------------------

Btw, instructions marked for forwarding (by TER) are not expanded to useless
code, but not expanded at all (or better said, only at the point of use).

The back-and-forth between QImode and SImode on arm seems to stem from
register promotion trying really hard to work on only SImode regs.


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42972