From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-bugs-return-309829-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org>
Received: (qmail 32458 invoked by alias); 25 Feb 2010 16:01:59 -0000
Received: (qmail 29876 invoked by uid 48); 25 Feb 2010 16:01:39 -0000
Date: Thu, 25 Feb 2010 16:01:00 -0000
Message-ID: <20100225160139.29868.qmail@sourceware.org>
X-Bugzilla-Reason: CC
References: <bug-42502-17572@http.gcc.gnu.org/bugzilla/>
Subject: [Bug rtl-optimization/42502] [4.4/4.5 Regression] Bad register allocation in a very simple code
In-Reply-To: <bug-42502-17572@http.gcc.gnu.org/bugzilla/>
Reply-To: gcc-bugzilla@gcc.gnu.org
To: gcc-bugs@gcc.gnu.org
From: "cltang at pllab dot cs dot nthu dot edu dot tw" <gcc-bugzilla@gcc.gnu.org>
Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm
Precedence: bulk
List-Id: <gcc-bugs.gcc.gnu.org>
List-Archive: <http://gcc.gnu.org/ml/gcc-bugs/>
List-Post: <mailto:gcc-bugs@gcc.gnu.org>
List-Help: <mailto:gcc-bugs-help@gcc.gnu.org>
Sender: gcc-bugs-owner@gcc.gnu.org
X-SW-Source: 2010-02/txt/msg02581.txt.bz2



------- Comment #5 from cltang at pllab dot cs dot nthu dot edu dot tw  2010-02-25 16:01 -------
The cause seems to be the subreg lowering pass, the returning of the DImode
value is split into:

(insn 46 32 47 7 c.c:23 (set (reg:SI 0 r0)
        (subreg:SI (reg:DI 133 [ D.2015 ]) 0)) 167 {*thumb1_movsi_insn} (nil))

(insn 47 46 40 7 c.c:23 (set (reg:SI 1 r1 [+4 ])
        (subreg:SI (reg:DI 133 [ D.2015 ]) 4)) 167 {*thumb1_movsi_insn}
(expr_list:REG_DEAD (reg:DI 133 [ D.2015 ])
        (nil)))

As the IRA dumps show, this splitting into two insns causes r0 to conflict with
the lifetime of r133, preventing it to be assigned to r0-r1 and coalesced.

I don't have a patch for this, but I found turning off the subreg lowering by
-fno-split-wide-types retains the DImode return:

(insn 37 32 40 7 c.c:23 (set (reg/i:DI 0 r0)
        (reg:DI 133 [ D.2015 ])) 164 {*thumb1_movdi_insn} (expr_list:REG_DEAD
(reg:DI 133 [ D.2015 ])
        (nil)))

and generates:
        push    {r4, r5, r6, lr}
        sub     sp, sp, #16
        mov     r5, r0
        mov     r0, sp
        mov     r6, r1
        mov     r4, sp
        bl      func
        cmp     r5, #1
        bne     .L2
        ldr     r0, [sp]
        ldr     r1, [sp, #4]
        b       .L3
.L2:
        ldr     r0, [r4, #8]
        ldr     r1, [r4, #12]
        cmp     r6, #2
        beq     .L3
        ldr     r3, [r4]
        ldr     r4, [r4, #4]
        sub     r0, r0, r3
        sbc     r1, r1, r4
.L3:
        add     sp, sp, #16
        @ sp needed for prologue
        pop     {r4, r5, r6, pc}

which should be similar to what 4.2.1 generated.
The sp duplication in r4, as mentioned by others, is another problem.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42502