From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 23693 invoked by alias); 1 Apr 2010 23:34:12 -0000 Received: (qmail 23472 invoked by uid 48); 1 Apr 2010 23:33:58 -0000 Date: Thu, 01 Apr 2010 23:34:00 -0000 Message-ID: <20100401233358.23471.qmail@sourceware.org> X-Bugzilla-Reason: CC References: Subject: [Bug middle-end/42509] [4.5 Regression] bootstrap failure in stage3 (integer overflow in preprocessor expression) In-Reply-To: Reply-To: gcc-bugzilla@gcc.gnu.org To: gcc-bugs@gcc.gnu.org From: "rearnsha at gcc dot gnu dot org" Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2010-04/txt/msg00153.txt.bz2 ------- Comment #17 from rearnsha at gcc dot gnu dot org 2010-04-01 23:33 ------- So what is happening is that the cfg cleanup pass in the CSA pass is merging the tails of two basic blocks. These blocks both contain an insn that loads a DI value into R0/R1 from the address in R1. Because the 'base' values for the two loads are different (and the calculation for that is not merged), merge_memattrs squishes the MEM_OFFSET field, setting it to NULL_RTX. The BBRO pass then splits this set of insns up again and puts them back in their original BBs. Finally the scheduling pass runs and calls nonoverlapping_memrefs_p on the load instruction and a preceding store. That then appears to assume that the two memory accesses cannot overlap and thus cannot alias each other; and finally the scheduler moves the store after the load. This smells very generic to me so setting back to P3 for release maintainer review. -- rearnsha at gcc dot gnu dot org changed: What |Removed |Added ---------------------------------------------------------------------------- Component|target |middle-end Keywords| |wrong-code Priority|P2 |P3 Last reconfirmed|2009-12-30 23:54:53 |2010-04-01 23:33:57 date| | http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42509