[Bug inline-asm/43518] New: ARM register constraint for ldrd and strd instructions

[Bug inline-asm/43518] New: ARM register constraint for ldrd and strd instructions

[paulius dot zaleckas at gmail dot com]

ldrd and strd registers require pair of registers restricted to being an
even-numbered register and the odd-numbered register that immediately follows
it (for example, R10 and R11).

We need additional constraint when declaring unsigned long long to assign
appropriate register-pair so it will work with ldrd/strd in inline-asm.

Example:
register usigned long long x asm ("???");
asm volatile ("ldrd\t%0, [%1]" : "=r" (x) : "r" (io_base));


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           Summary: ARM register constraint for ldrd and strd instructions
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: inline-asm
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: paulius dot zaleckas at gmail dot com


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43518

[Bug inline-asm/43518] ARM register constraint for ldrd and strd instructions

[rearnsha at gcc dot gnu dot org]

------- Comment #1 from rearnsha at gcc dot gnu dot org  2010-04-05 10:02 -------
Please supply a full testcase, and explain precisely the problem you are
seeing.  I cannot determine from your initial post what problem you are seeing.


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rearnsha at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |WAITING
 GCC target triplet|                            |arm


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43518

[Bug inline-asm/43518] ARM register constraint for ldrd and strd instructions

[paulius dot zaleckas at gmail dot com]

------- Comment #2 from paulius dot zaleckas at gmail dot com  2010-04-20 13:39 -------
(In reply to comment #1)
> Please supply a full testcase, and explain precisely the problem you are
> seeing.  I cannot determine from your initial post what problem you are seeing.

Currently I am extremely busy... unable to provide stand-alone test case.
But please look at this thread for the actual problem:
http://lkml.org/lkml/2010/3/20/37


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43518

[Bug inline-asm/43518] ARM register constraint for ldrd and strd instructions

[rearnsha at gcc dot gnu dot org]

------- Comment #3 from rearnsha at gcc dot gnu dot org  2010-04-23 12:44 -------
EABI configurations will guarantee that 64-bit sized objects will be in
even/odd register pairs.  It's best not to use LDRD on the old ABI because in
general the ABI can't guarantee the alignment requirements for memory either.

Plus, the old ABI is heading for obsolescence.  So not planning to fix.


-- 

rearnsha at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|WAITING                     |RESOLVED
         Resolution|                            |WONTFIX


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43518