From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 654 invoked by alias); 24 Aug 2010 18:59:08 -0000 Received: (qmail 596 invoked by uid 48); 24 Aug 2010 18:58:57 -0000 Date: Tue, 24 Aug 2010 18:59:00 -0000 Message-ID: <20100824185857.595.qmail@sourceware.org> X-Bugzilla-Reason: CC References: Subject: [Bug target/45359] poor -march=native choices for VIA C7 Esther processors In-Reply-To: Reply-To: gcc-bugzilla@gcc.gnu.org To: gcc-bugs@gcc.gnu.org From: "opod at nic-nac-project dot org" Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2010-08/txt/msg02008.txt.bz2 ------- Comment #2 from opod at nic-nac-project dot org 2010-08-24 18:58 ------- (In reply to comment #1) The processor clearly supports SSE3 so perhaps -march=prescott would be better instead of -march=pentium-m. I also assumed that -march=pentium-m implies -mfpmath=387 but it does not seem to apply (or matter). Finally, -march=native on my laptop picks up L1 and L2 cache sizes as --params which does not happen for the VIA C7. Just for reference, it is reported as Cache info L1 Instruction cache: 64KB, 4-way associative, 1 lines per tag, line size=64 bytes. L1 Data cache: 64KB 4-way associative, 1 lines per tag, line size=64 bytes. L2 (on CPU) cache: 128KB 10-way associative, 1 lines per tag, line size=64 bytes. HTH -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45359