[Bug rtl-optimization/43491] New: Unnecessary temporary for global register variable

[Bug rtl-optimization/43491] New: Unnecessary temporary for global register variable

[mirq-gccboogs at rere dot qmqm dot pl]

gcc sometimes allocates a temporary register for a variable that is global and
has a fixed register. This happens when:
 a. the global is a register-fixed variable
 b. global is a pointer to structure
 c. an address of structure's field is passed as argument to inlined function
 d. the global is marked as constant


code:

struct b {
        unsigned g,h,j;
};

register struct b *const reg asm("r4");

static inline int diff(unsigned *p)
{
        return *p;
}

void c(void);

void d(void)
{
        while (diff(&reg->j))
                c();
}


generates:

d:
        @ args = 0, pretend = 0, frame = 0
        @ frame_needed = 0, uses_anonymous_args = 0
        ldr     r3, [r4, #8]    @ first ok
        push    {r5, lr}
        mov     r5, r4          @ an temporary even when r4 is marked const
        cbz     r3, .L1
.L4:   
        bl      c
        ldr     r3, [r5, #8]    @ accesses via temporary
        cmp     r3, #0
        bne     .L4
.L1:   
        pop     {r5, pc}


-- 
           Summary: Unnecessary temporary for global register variable
           Product: gcc
           Version: 4.5.0
            Status: UNCONFIRMED
          Severity: enhancement
          Priority: P3
         Component: rtl-optimization
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: mirq-gccboogs at rere dot qmqm dot pl
 GCC build triplet: i686-pc-linux-gnu
  GCC host triplet: i686-pc-linux-gnu
GCC target triplet: arm-none-eabi


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43491

[Bug rtl-optimization/43491] Unnecessary temporary for global register variable

[ibolton at gcc dot gnu dot org]

------- Comment #1 from ibolton at gcc dot gnu dot org  2010-09-08 16:21 -------
reg is assigned to a temporary (reg.0) at the very first tree pass, as shown by
this 004t.gimple dump:

d ()
{
  struct b * const reg.0;
  unsigned int * D.2019;
  int D.2020;

  goto <D.1276>;
  <D.1275>:
  c ();
  <D.1276>:
  reg.0 = reg;
  D.2019 = &reg.0->j;
  D.2020 = diff (D.2019);
  if (D.2020 != 0) goto <D.1275>; else goto <D.1277>;
  <D.1277>:
}

I'm thinking that this is perfectly normal thing to do, and that the redundant
move is meant to disappear in a later pass.  My guess is that IRA is choosing
not to assign the pseudo to r4, but I do not know why at the moment.


-- 

ibolton at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
     Ever Confirmed|0                           |1
           Keywords|                            |missed-optimization, ra
      Known to fail|                            |4.5.3 4.6.0
   Last reconfirmed|0000-00-00 00:00:00         |2010-09-08 16:21:50
               date|                            |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43491

[Bug rtl-optimization/43491] Unnecessary temporary for global register variable

[amker.cheng at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43491

amker.cheng <amker.cheng at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |amker.cheng at gmail dot
                   |                            |com

--- Comment #2 from amker.cheng <amker.cheng at gmail dot com> 2011-11-23 05:50:51 UTC ---
Noticed that pass 097t.copyprop4 propagates reg.0_12 to statement Y in
following dump:
-------------------------------------
<bb 2>:
  reg.0_12 = reg;
  D.4705_13 = MEM[(unsigned int *)reg.0_12 + 8B];   <-----statement Z
  if (D.4705_13 != 0)
    goto <bb 3>;
  else
    goto <bb 6>;

<bb 3>:

<bb 4>:
  c ();
  reg.0_1 = reg.0_12;                                                 
<-----statement X
  D.4705_3 = MEM[(unsigned int *)reg.0_1 + 8B]; <-----statement Y
  if (D.4705_3 != 0)
    goto <bb 5>;
  else
    goto <bb 6>;

<bb 5>:
  goto <bb 4>;

<bb 6>:
  return;
-------------------------------------
to be:
  reg.0_1 = reg.0_12;                                                  
<-----statement X
  D.4705_3 = MEM[(unsigned int *)reg.0_12 + 8B]; <-----statement Y

So, should it propagates reg directly? Could this be done on ssa?

Also I found 
1) there are similar cases on redundant copy or load constant, for example,
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44025
2) some of these cases are generated after expanding into rtl;
3) redundant copy might be handled in IRA, but redundant load const might be
more difficult.

How about extending regcprop.c pass into a global pass?

[Bug rtl-optimization/43491] Unnecessary temporary for global register variable

[amker.cheng at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43491

--- Comment #3 from amker.cheng <amker.cheng at gmail dot com> 2011-11-24 09:24:37 UTC ---
(In reply to comment #1)

> 
> I'm thinking that this is perfectly normal thing to do, and that the redundant
> move is meant to disappear in a later pass.  My guess is that IRA is choosing
> not to assign the pseudo to r4, but I do not know why at the moment.

As dump in 191r.shed1:
------------------------------------------
(insn 5 7 6 2 (set (reg/f:SI 135 [ reg.0 ])
        (reg/v:SI 4 r4 [ reg ])) pr43491.c:16 709 {*thumb2_movsi_insn}
     (expr_list:REG_DEAD (reg/v:SI 4 r4 [ reg ])
        (nil)))

(insn 6 5 8 2 (set (reg:SI 137 [ MEM[(unsigned int *)reg.0_12 + 8B] ])
        (mem:SI (plus:SI (reg/f:SI 135 [ reg.0 ])
                (const_int 8 [0x8])) [2 MEM[(unsigned int *)reg.0_12 + 8B]+0 S4
A32])) pr43491.c:16 709 {*thumb2_movsi_insn}
     (nil))

(jump_insn 8 6 49 2 (parallel [
            (set (pc)
                (if_then_else (eq (reg:SI 137 [ MEM[(unsigned int *)reg.0_12 +
8B] ])
                        (const_int 0 [0]))
                    (label_ref:SI 22)
                    (pc)))
            (clobber (reg:CC 24 cc))
        ]) pr43491.c:16 747 {*thumb2_cbz}
     (expr_list:REG_DEAD (reg:SI 137 [ MEM[(unsigned int *)reg.0_12 + 8B] ])
        (expr_list:REG_UNUSED (reg:CC 24 cc)
            (expr_list:REG_BR_PROB (const_int 900 [0x384])
                (nil))))
 -> 22)

(code_label 49 8 48 3 4 "" [1 uses])

(note 48 49 16 3 [bb 3] NOTE_INSN_BASIC_BLOCK)

(note 16 48 14 3 NOTE_INSN_DELETED)

(call_insn 14 16 15 3 (parallel [
            (call (mem:SI (symbol_ref:SI ("c") [flags 0x41]  <function_decl
0xb76c3b80 c>) [0 c S4 A32])
                (const_int 0 [0]))
            (use (const_int 0 [0]))
            (clobber (reg:SI 14 lr))
        ]) pr43491.c:17 247 {*call_symbol}
     (nil)
    (nil))

(insn 15 14 17 3 (set (reg:SI 138 [ MEM[(unsigned int *)reg.0_12 + 8B] ])
        (mem:SI (plus:SI (reg/f:SI 135 [ reg.0 ])
                (const_int 8 [0x8])) [2 MEM[(unsigned int *)reg.0_12 + 8B]+0 S4
A32])) pr43491.c:16 709 {*thumb2_movsi_insn}
     (nil))
------------------------------------------
Since reg is manually declared in r4, function globalize_reg sets r4 in
fixed_reg_set/call_used_reg_set/call_fixed_reg_set. IRA then add r4 into
allocno(r135)'s conflict_hard_regs. That's why IRA not assigns the pseudo(r135)
to r4. I guess it's natural unless we can make IRA aware of constant register.

[Bug rtl-optimization/43491] Unnecessary temporary for global register variable

[amker.cheng at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43491

--- Comment #4 from amker.cheng <amker.cheng at gmail dot com> 2011-12-21 03:44:03 UTC ---
This bug is even worse on mips.

The cause is ssa-pre eliminates global register variable when it is the RHS of
single assign statment, while following passes do not handle the const/register
attributes of the variable.
It can be handled in tree-ssa-pre.c without hurting true redundancy elimination
on global register variables.

So could somebody change the tag from rtl-optimization to tree-optimization?