[Bug target/45805] New: VFP/Neon double precision register expected -- `vmovl.s16 q2,s8

[Bug target/45805] New: VFP/Neon double precision register expected -- `vmovl.s16 q2,s8

[raj.khem at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45805

           Summary: VFP/Neon double precision register expected --
                    `vmovl.s16 q2,s8
           Product: gcc
           Version: 4.6.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: raj.khem@gmail.com


Created attachment 21892
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=21892
testcase

The attached testcase does not compile with gcc trunk when using vectorizer and
neon on arm.

arm-oe-linux-gnueabi-gcc -mfpu=neon -mfloat-abi=softfp -O3 -c test.c

It works fine if I add -mvectorize-with-neon-quad option

here is my gcc configuration
Using built-in specs.
COLLECT_GCC=arm-none-linux-gnueabi-gcc
COLLECT_LTO_WRAPPER=/home/kraj/work/cross/arm-none-linux-gnueabi/tools/libexec/gcc/arm-none-linux-gnueabi/4.6.0/lto-wrapper
Target: arm-none-linux-gnueabi
Configured with:
/home/kraj/work/cross/arm-none-linux-gnueabi/../../gcc-trunk/configure
--target=arm-none-linux-gnueabi
--prefix=/home/kraj/work/cross/arm-none-linux-gnueabi/tools
--with-sysroot=/home/kraj/work/cross/arm-none-linux-gnueabi/sysroot
--enable-__cxa_atexit --disable-libssp --disable-libgomp --disable-libmudflap
--enable-languages=c,c++
Thread model: posix
gcc version 4.6.0 20100927 (experimental) (GCC)

[Bug target/45805] VFP/Neon double precision register expected -- `vmovl.s16 q2,s8

[raj.khem at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45805

--- Comment #2 from Khem Raj <raj.khem at gmail dot com> 2010-09-27 18:33:58 UTC ---
(In reply to comment #1)
> Created attachment 21897 [details]
> Fix register specifier in instruction template for vmovl.

I tried similar patch locally before submitting the bug (changed only vmovl
pattern)
but I got an ICE which is again same I am getting with this patch too

$ arm-none-linux-gnueabi-gcc-4.6.0 -mfloat-abi=softfp -mfpu=neon a.c -O3
a.c: In function ‘try_8x8basis_c’:
a.c:14:1: internal compiler error: output_operand: invalid operand for code 'P'

[Bug target/45805] VFP/Neon double precision register expected -- `vmovl.s16 q2,s8

[belagod at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45805

--- Comment #3 from belagod at gcc dot gnu.org 2010-09-28 10:58:31 UTC ---
(In reply to comment #2)
> (In reply to comment #1)
> > Created attachment 21897 [details] [details]
> > Fix register specifier in instruction template for vmovl.
> 
> I tried similar patch locally before submitting the bug (changed only vmovl
> pattern)
> but I got an ICE which is again same I am getting with this patch too
> 
> $ arm-none-linux-gnueabi-gcc-4.6.0 -mfloat-abi=softfp -mfpu=neon a.c -O3
> a.c: In function ‘try_8x8basis_c’:
> a.c:14:1: internal compiler error: output_operand: invalid operand for code 'P'

That's strange. I'm not able to reproduce the ICE on my side with or without
-mvectorize-with-neon-quad with this patch. I don't know if configuring to
build for cortex-a9 has anything to do with this because that's what is on my
side and you don't seem to have it configured to build for a cpu with NEON.
Does the ICE happen if you specify -mcpu=cortex-a9 on the command-line? Also,
are you using trunk's HEAD?

[Bug target/45805] VFP/Neon double precision register expected -- `vmovl.s16 q2,s8

[raj.khem at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45805

--- Comment #4 from Khem Raj <raj.khem at gmail dot com> 2010-09-28 15:22:53 UTC ---
(In reply to comment #3)
> (In reply to comment #2)
> > (In reply to comment #1)
> > > Created attachment 21897 [details] [details] [details]
> > > Fix register specifier in instruction template for vmovl.
> > 
> > I tried similar patch locally before submitting the bug (changed only vmovl
> > pattern)
> > but I got an ICE which is again same I am getting with this patch too
> > 
> > $ arm-none-linux-gnueabi-gcc-4.6.0 -mfloat-abi=softfp -mfpu=neon a.c -O3
> > a.c: In function ‘try_8x8basis_c’:
> > a.c:14:1: internal compiler error: output_operand: invalid operand for code 'P'
> 
> That's strange. I'm not able to reproduce the ICE on my side with or without
> -mvectorize-with-neon-quad with this patch. I don't know if configuring to
> build for cortex-a9 has anything to do with this because that's what is on my
> side and you don't seem to have it configured to build for a cpu with NEON.
> Does the ICE happen if you specify -mcpu=cortex-a9 on the command-line? Also,
> are you using trunk's HEAD?

with -mcpu=cortex-a9 it works without it gets the ICE. you can try
-mcpu=cortex-a8 it should ICE.

[Bug target/45805] VFP/Neon double precision register expected -- `vmovl.s16 q2,s8

[belagod at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45805

--- Comment #5 from belagod at gcc dot gnu.org 2010-09-28 16:25:37 UTC ---
(In reply to comment #4)
> (In reply to comment #3)
> > (In reply to comment #2)
> > > (In reply to comment #1)
> > > > Created attachment 21897 [details] [details] [details] [details]
> > > > Fix register specifier in instruction template for vmovl.
> > > 
> > > I tried similar patch locally before submitting the bug (changed only vmovl
> > > pattern)
> > > but I got an ICE which is again same I am getting with this patch too
> > > 
> > > $ arm-none-linux-gnueabi-gcc-4.6.0 -mfloat-abi=softfp -mfpu=neon a.c -O3
> > > a.c: In function ‘try_8x8basis_c’:
> > > a.c:14:1: internal compiler error: output_operand: invalid operand for code 'P'
> > 
> > That's strange. I'm not able to reproduce the ICE on my side with or without
> > -mvectorize-with-neon-quad with this patch. I don't know if configuring to
> > build for cortex-a9 has anything to do with this because that's what is on my
> > side and you don't seem to have it configured to build for a cpu with NEON.
> > Does the ICE happen if you specify -mcpu=cortex-a9 on the command-line? Also,
> > are you using trunk's HEAD?
> 
> with -mcpu=cortex-a9 it works without it gets the ICE. you can try
> -mcpu=cortex-a8 it should ICE.

Ah, now I can reproduce it. The rtl-trace shows that memory operands were being
matched for the neon_unpack<US>_<mode> pattern inpsite of the
'register_operand' predicate. The constraint here needs a "w" which makes the
ICE go away by matching register operands only and your example to compile
fine. I've attached another patch.

[Bug target/45805] VFP/Neon double precision register expected -- `vmovl.s16 q2,s8

[raj.khem at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45805

--- Comment #7 from Khem Raj <raj.khem at gmail dot com> 2010-09-28 18:30:52 UTC ---
(In reply to comment #6)
> Created attachment 21903 [details]
> vmov[l,n] fix

yes the 'w' constraint will do the trick.
this patch works well for me.

[Bug target/45805] VFP/Neon double precision register expected -- `vmovl.s16 q2,s8

[belagod at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45805

--- Comment #8 from belagod at gcc dot gnu.org 2010-10-07 16:00:13 UTC ---
Author: belagod
Date: Thu Oct  7 16:00:06 2010
New Revision: 165122

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=165122
Log:
2010-10-07  Tejas Belagod  <tejas.belagod@arm.com>

    PR target/45805
        * config/arm/neon.md (neon_unpack<US>_<mode>): Add 'w' to
        constraint, add register specifier in instruction template.
        (neon_vec_pack_trunc_<mode>): Likewise.
        (neon_vec_<US>mult_<mode>): Add register specifier to
        instruction template.


Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/arm/neon.md

[Bug target/45805] VFP/Neon double precision register expected -- `vmovl.s16 q2,s8

[belagod at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45805

belagod at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|                            |FIXED

--- Comment #9 from belagod at gcc dot gnu.org 2010-10-08 12:53:04 UTC ---
This bug has been fixed.

[Bug target/45805] VFP/Neon double precision register expected -- `vmovl.s16 q2,s8

[richard.earnshaw at arm dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45805

--- Comment #10 from richard.earnshaw at arm dot com 2010-10-08 12:53:40 UTC ---
I shall be out of the office from Monday 11 October until Monday 1 November; I
will not have email access during most of that time, so I will read your
message when I return.
For urgent issues, please contact Roger Teague or Matthew Gretton-Dann.