From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 5518 invoked by alias); 18 Oct 2010 15:43:21 -0000 Received: (qmail 5490 invoked by uid 22791); 18 Oct 2010 15:43:19 -0000 X-SWARE-Spam-Status: No, hits=-1.0 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_50,MISSING_MID,TW_CP X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 18 Oct 2010 15:43:14 +0000 From: "rguenth at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/45472] [4.5/4.6 Regression] ICE: in move_op_ascend, at sel-sched.c:6124 with -fselective-scheduling2 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: rguenth at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Priority: P2 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 4.5.2 X-Bugzilla-Changed-Fields: In-Reply-To: References: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Date: Mon, 18 Oct 2010 15:43:00 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2010-10/txt/msg01483.txt.bz2 Message-ID: <20101018154300.DvOSo5f7yAzRgc0cnCievCBsF1uL9Np-2wcr1EPhubw@z> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45472 --- Comment #9 from Richard Guenther 2010-10-18 15:42:44 UTC --- (In reply to comment #8) > Would it make sense to make the statement volatile even if only some > subcomponents (or all subcomponents) are volatile? > > I like (2); if I understand it correctly, in this case vv1 and vv2 would not be > volatile, but you'd still have > > vv1 ={v} vv2; > > in the GIMPLE source. It should be possible to use a bit on > {ARRAY,RECORD,UNION,QUAL_UNION}_TYPE to cache this, e.g. > > #define TYPE_HAS_VOLATILE_PARTS(T) \ > (AGGREGATE_TYPE_P (T) \ > ? TYPE_UNSIGNED (T) \ > : TYPE_VOLATILE (T)) > > #define AGGREGATE_TYPE_CHECK(T) \ > TREE_CHECK4(T, ARRAY_TYPE, RECORD_TYPE, UNION_TYPE, QUAL_UNION_TYPE) > > #define SET_TYPE_HAS_VOLATILE_PARTS(T, V) \ > (TYPE_UNSIGNED (AGGREGATE_TYPE_CHECK (T)) = (V)) > > Separately, expand would of course need to be taught about expanding accesses > to volatile subcomponents as mem/v. If this approach was feasible, it would > have the advantage of splitting the task in two parts, one for GIMPLE > (including possibly the verifier) and one for expand. If we want to treat vv1 = vv2 as volatile then the frontends can now simply emit MEM_REF <&vv1> = MEM_REF <&vv2> with TREE_THIS_VOLATILE set and things should work. That leaves it up to the frontend on how to deal with this. The much harder question is how to expand vv1 = vv2 "correctly". Thus, we need to define what happens and document it. Also consider memcpy (&vv1, &vv2) and eventually the compiler optimizing that to vv1 = vv2 (note the lack of {v} here).