From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from nikam.ms.mff.cuni.cz (nikam.ms.mff.cuni.cz [195.113.20.16]) by sourceware.org (Postfix) with ESMTPS id 8B806395B408; Wed, 16 Nov 2022 15:34:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 8B806395B408 Authentication-Results: sourceware.org; dmarc=fail (p=none dis=none) header.from=ucw.cz Authentication-Results: sourceware.org; spf=none smtp.mailfrom=kam.mff.cuni.cz Received: by nikam.ms.mff.cuni.cz (Postfix, from userid 16202) id 49A1B284AB8; Wed, 16 Nov 2022 16:33:59 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ucw.cz; s=gen1; t=1668612839; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=kYYlW6WMSQVY/T/KMVFI7cQ6YSggLRTEIgMcQlLqsPk=; b=hHgEv/BBlY6iTjBHI39fgbm2TtsgcJXJsOu93wOkN21lt/B7pMsT2g4NMlzal/uovzwgQX clQlpvqJ5hlFa5xqlOXdT/x3CGC5aMYPllLynVABJ1c7ElzPX1BVGvbtddOU/KvEgpqa1A 1AvFOClUL49ojjdvyPe99SHRPTYyL8U= Date: Wed, 16 Nov 2022 16:33:59 +0100 From: Jan Hubicka To: "amonakov at gcc dot gnu.org" Cc: gcc-bugs@gcc.gnu.org Subject: Re: [Bug target/87832] AMD pipeline models are very costly size-wise Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > > Do you mean we should fix modeling of divisions there as well? I don't have > latency/throughput measurements for those CPUs, nor access so I can run > experiments myself, unfortunately. > > I guess you mean just making a patch to model division units separately, > leaving latency/throughput as in current incorrect models, and leave it to > manufacturers to correct it? Alternatively, for AMD Bobcat and Bulldozer we > might be able to crowd-source it eventually. Actually for older cores I think the manufacturers do not care much. I still have a working Bulldozer machine and I can do some testing. I think in Buldozer case I was basing the latency throughput on data in Agner Fog's manuals. How do you test it? Honza