From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 64B423968C1A; Tue, 13 Apr 2021 10:55:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 64B423968C1A From: "jakub at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/100056] [9/10/11 Regression] orr + lsl vs. [us]bfiz Date: Tue, 13 Apr 2021 10:55:48 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 9.3.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: jakub at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P2 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 9.4 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 13 Apr 2021 10:55:48 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D100056 --- Comment #2 from Jakub Jelinek --- So, the change is that previously there was just one significant combinatio= n, Trying 7 -> 8: 7: r96:SI=3Dr94:SI<<0xb 8: r95:SI=3Dr96:SI|r94:SI REG_DEAD r96:SI REG_DEAD r94:SI Successfully matched this instruction: (set (reg:SI 95) (ior:SI (ashift:SI (reg/v:SI 94 [ i ]) (const_int 11 [0xb])) (reg/v:SI 94 [ i ]))) With the addition of 2 to 2 combination, Trying 2 -> 7: 2: r94:SI=3Dzero_extend(x0:QI) REG_DEAD x0:QI 7: r96:SI=3Dr94:SI<<0xb is replaced with: (set (reg/v:SI 94 [ i ]) (zero_extend:SI (reg:QI 0 x0 [ i ]))) and (set (reg:SI 96) (and:SI (ashift:SI (reg:SI 0 x0 [ i ]) (const_int 11 [0xb])) (const_int 522240 [0x7f800]))) and therefore the combination that was successful earlier no longer trigger= s. So, I think it would be helpful to have a combiner splitter that would split Trying 7, 2 -> 8: 7: r96:SI=3Dx0:SI<<0xb&0x7f800 REG_DEAD x0:QI 2: r94:SI=3Dzero_extend(x0:QI) 8: r95:SI=3Dr96:SI|r94:SI the zero_extend and (set (reg:SI 95) (ior:SI (ashift:SI (reg/v:SI 94 [ i ]) (const_int 11 [0xb])) (reg/v:SI 94 [ i ])))=