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From: "vgupta at synopsys dot com" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug tree-optimization/100363] gcc generating wider load/store than
 warranted at -O3
Date: Fri, 30 Apr 2021 22:33:23 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D100363

--- Comment #6 from Vineet Gupta <vgupta at synopsys dot com> ---
(In reply to Linus Torvalds from comment #4)
> (In reply to Andrew Pinski from comment #1)
> > The loop gets vectorized, I don't see the problem really.
>=20
>=20
> See
>=20
>=20=20=20=20
> https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/issues/=
372
>=20
> and in particular the comment
>=20
>    "In the first 8-byte copy, src and dst overlap"
>=20
> so apparently gcc has decided that they can't overlap, despite the two
> pointers being literally generated from the same base pointer.

Exactly:

> But I don't real arc assembly, so I'll have to take Vineet's word for it.

fwiw:
LDD.a [base, off] is 8-byte load with pre-incr : eff addr =3D base + offset
STD.ab [base, off] is 8-byte store with post-incr: eff addr =3D base


> Vineet, have you been able to generate a smaller test-case?

No I'm afraid not.=