From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 171D33835824; Mon, 17 May 2021 12:24:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 171D33835824 From: "rguenth at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug middle-end/100604] GCC generates invalid LO_SYM for unaligned global Date: Mon, 17 May 2021 12:24:47 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: middle-end X-Bugzilla-Version: 11.1.1 X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: rguenth at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 17 May 2021 12:24:48 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D100604 --- Comment #3 from Richard Biener --- (In reply to dragan.mladjenovic from comment #2) > It seems so. Something like this helps in this case: >=20 > diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c > index 07e908624a0..a102a9288c5 100644 > --- a/gcc/emit-rtl.c > +++ b/gcc/emit-rtl.c > @@ -2385,7 +2385,7 @@ adjust_address_1 (rtx memref, machine_mode mode, > poly_int64 offset, > if (GET_MODE (memref) !=3D BLKmode > && GET_CODE (addr) =3D=3D LO_SUM > && known_in_range_p (offset, > - 0, (GET_MODE_ALIGNMENT (GET_MODE (memref)) > + 0, (MIN (GET_MODE_ALIGNMENT (GET_MODE > (memref)), attrs.align) > / BITS_PER_UNIT))) > addr =3D gen_rtx_LO_SUM (address_mode, XEXP (addr, 0), > plus_constant (address_mode, >=20 > Don't know which one to trust. The memref has SImode. Caller wants to cre= ate > HImode one. The attrs.align matches that of HImode. on a strict-align target if the MEM has SImode it should be aligned to the SImode alignment. Of course generally you should never look at GET_MODE_ALIGNMENT but use attrs.align unconditionally (aka MEM_ALIGN). Now the question is where the HImode aligned MEM:SI comes from for a strict-alignment target. That said, unconditionally using attrs.align looks like the correct fix.=