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From: "willschm at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/100693] PPC: missing 64-bit addg6s
Date: Fri, 04 Mar 2022 22:05:40 +0000 [thread overview]
Message-ID: <bug-100693-4-LdaYTfaxhE@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-100693-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100693
Will Schmidt <willschm at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |willschm at gcc dot gnu.org
--- Comment #2 from Will Schmidt <willschm at gcc dot gnu.org> ---
(In reply to Segher Boessenkool from comment #1)
> Confirmed. The define_insn for it is for SImode only as well.
I see the SImode for the define as mentioned
(define_insn "addg6s"
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "register_operand" "r")]
UNSPEC_ADDG6S))]
"TARGET_POPCNTD"
"addg6s %0,%1,%2"
[(set_attr "type" "integer")])
But.. a simple testcase with unsigned long long parms builds ok. (both gcc 11
and older gcc 9).
unsigned long long bcd_arith_longlong (unsigned long long a, unsigned long long
b)
{
return __builtin_addg6s (a, b);
}
Expand shows.. this instruction is using a subset, erm, subreg of the inputs.
Is this expected behavior?
(insn 11 10 12 2 (set (reg:SI 128)
(unspec:SI [
(subreg/s/v:SI (reg:DI 121 [ _1 ]) 0)
(subreg/s/v:SI (reg:DI 122 [ _2 ]) 0)
] UNSPEC_ADDG6S)) "./addg6s.c":11:16 -1
(nil))
prev parent reply other threads:[~2022-03-04 22:05 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-20 7:27 [Bug target/100693] New: " jens.seifert at de dot ibm.com
2021-05-20 20:58 ` [Bug target/100693] " segher at gcc dot gnu.org
2021-05-20 20:58 ` segher at gcc dot gnu.org
2022-03-04 22:05 ` willschm at gcc dot gnu.org [this message]
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