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* [Bug target/100693] New: PPC: missing 64-bit addg6s
@ 2021-05-20  7:27 jens.seifert at de dot ibm.com
  2021-05-20 20:58 ` [Bug target/100693] " segher at gcc dot gnu.org
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: jens.seifert at de dot ibm.com @ 2021-05-20  7:27 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100693

            Bug ID: 100693
           Summary: PPC: missing 64-bit addg6s
           Product: gcc
           Version: 8.3.1
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: jens.seifert at de dot ibm.com
  Target Milestone: ---

gcc only provides

unsigned int __builtin_addg6s (unsigned int, unsigned int);

but addg6s is a 64-bit operation. I require

unsigned long long __builtin_addg6s (unsigned long long, unsigned long long);
.

I for now use inline assembly.

^ permalink raw reply	[flat|nested] 4+ messages in thread
* [Bug target/100693] PPC: missing 64-bit addg6s
  2021-05-20  7:27 [Bug target/100693] New: PPC: missing 64-bit addg6s jens.seifert at de dot ibm.com
@ 2021-05-20 20:58 ` segher at gcc dot gnu.org
  2021-05-20 20:58 ` segher at gcc dot gnu.org
  2022-03-04 22:05 ` willschm at gcc dot gnu.org
  2 siblings, 0 replies; 4+ messages in thread
From: segher at gcc dot gnu.org @ 2021-05-20 20:58 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100693

--- Comment #1 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Confirmed.  The define_insn for it is for SImode only as well.

^ permalink raw reply	[flat|nested] 4+ messages in thread
* [Bug target/100693] PPC: missing 64-bit addg6s
  2021-05-20  7:27 [Bug target/100693] New: PPC: missing 64-bit addg6s jens.seifert at de dot ibm.com
  2021-05-20 20:58 ` [Bug target/100693] " segher at gcc dot gnu.org
@ 2021-05-20 20:58 ` segher at gcc dot gnu.org
  2022-03-04 22:05 ` willschm at gcc dot gnu.org
  2 siblings, 0 replies; 4+ messages in thread
From: segher at gcc dot gnu.org @ 2021-05-20 20:58 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100693

Segher Boessenkool <segher at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2021-05-20
             Status|UNCONFIRMED                 |NEW

^ permalink raw reply	[flat|nested] 4+ messages in thread
* [Bug target/100693] PPC: missing 64-bit addg6s
  2021-05-20  7:27 [Bug target/100693] New: PPC: missing 64-bit addg6s jens.seifert at de dot ibm.com
  2021-05-20 20:58 ` [Bug target/100693] " segher at gcc dot gnu.org
  2021-05-20 20:58 ` segher at gcc dot gnu.org
@ 2022-03-04 22:05 ` willschm at gcc dot gnu.org
  2 siblings, 0 replies; 4+ messages in thread
From: willschm at gcc dot gnu.org @ 2022-03-04 22:05 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100693

Will Schmidt <willschm at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |willschm at gcc dot gnu.org

--- Comment #2 from Will Schmidt <willschm at gcc dot gnu.org> ---
(In reply to Segher Boessenkool from comment #1)
> Confirmed.  The define_insn for it is for SImode only as well.

I see the SImode for the define as mentioned

(define_insn "addg6s"
  [(set (match_operand:SI 0 "register_operand" "=r")
        (unspec:SI [(match_operand:SI 1 "register_operand" "r")
                    (match_operand:SI 2 "register_operand" "r")]
                   UNSPEC_ADDG6S))]
  "TARGET_POPCNTD"
  "addg6s %0,%1,%2"
  [(set_attr "type" "integer")])


But.. a simple testcase with unsigned long long parms builds ok.   (both gcc 11
and older gcc 9).  


unsigned long long bcd_arith_longlong (unsigned long long a, unsigned long long
b)
{
        return __builtin_addg6s (a, b); 
}

Expand shows.. this instruction is using a subset, erm, subreg of the inputs. 
Is this expected behavior?

(insn 11 10 12 2 (set (reg:SI 128)
        (unspec:SI [
                (subreg/s/v:SI (reg:DI 121 [ _1 ]) 0)
                (subreg/s/v:SI (reg:DI 122 [ _2 ]) 0)
            ] UNSPEC_ADDG6S)) "./addg6s.c":11:16 -1
     (nil))

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-03-04 22:05 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2021-05-20  7:27 [Bug target/100693] New: PPC: missing 64-bit addg6s jens.seifert at de dot ibm.com
2021-05-20 20:58 ` [Bug target/100693] " segher at gcc dot gnu.org
2021-05-20 20:58 ` segher at gcc dot gnu.org
2022-03-04 22:05 ` willschm at gcc dot gnu.org

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