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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/100760] [mips + msa] ICE: maximum number of generated reload insns per insn achieved
Date: Fri, 09 Jul 2021 06:29:30 +0000	[thread overview]
Message-ID: <bug-100760-4-8yb19QlFqC@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-100760-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100760

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Xi Ruoyao <xry111@gcc.gnu.org>:

https://gcc.gnu.org/g:82625a42e652d52fc6bbe6070f8d0589d5e0c8ad

commit r12-2183-g82625a42e652d52fc6bbe6070f8d0589d5e0c8ad
Author: Xi Ruoyao <xry111@mengyan1223.wang>
Date:   Fri Jun 18 20:11:42 2021 +0800

    mips: check MSA support for vector modes [PR100760,PR100761,PR100762]

    Check if the vector mode is really supported by MSA in certain cases,
    instead of testing ISA_HAS_MSA.  Simply testing ISA_HAS_MSA can cause
    ICE when MSA is enabled besides other MIPS SIMD extensions (notably,
    Loongson MMI).

    gcc/

            PR target/100760
            PR target/100761
            PR target/100762
            * config/mips/mips.c (mips_const_insns): Use MSA_SUPPORTED_MODE_P
            instead of ISA_HAS_MSA.
            (mips_expand_vec_unpack): Likewise.
            (mips_expand_vector_init): Likewise.

    gcc/testsuite/

            PR target/100760
            PR target/100761
            PR target/100762
            * gcc.target/mips/pr100760.c: New test.
            * gcc.target/mips/pr100761.c: New test.
            * gcc.target/mips/pr100762.c: New test.

  parent reply	other threads:[~2021-07-09  6:29 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-26  1:41 [Bug target/100760] New: " evan@coeus-group.com
2021-06-19  7:36 ` [Bug target/100760] " xry111 at mengyan1223 dot wang
2021-07-09  6:29 ` cvs-commit at gcc dot gnu.org [this message]
2024-05-29 18:04 ` syq at gcc dot gnu.org

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