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From: "evan@coeus-group.com" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/100760] New: [mips + msa] ICE: maximum number of generated reload insns per insn achieved Date: Wed, 26 May 2021 01:41:07 +0000 [thread overview] Message-ID: <bug-100760-4@http.gcc.gnu.org/bugzilla/> (raw) https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100760 Bug ID: 100760 Summary: [mips + msa] ICE: maximum number of generated reload insns per insn achieved Product: gcc Version: 10.2.1 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: evan@coeus-group.com Target Milestone: --- Created attachment 50869 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=50869&action=edit preprocessed, un-reduced reproducer I'm getting an ICE when attempting to compile some code on MIPS with MSA which works on other architectures, and on MIPS without MSA. Here is a reduced test case courtesy of C-Reduce: typedef int a; void b() { a __attribute__((__vector_size__(8))) c{1, 1}; } Compile with `mips64el-linux-gnuabi64-g++-10 -march=loongson3a -mmsa -o test test.c` I've also attached a pre-processed copy of the original, non-reduced code. The original is at https://github.com/simd-everywhere/simde/blob/7d0e2aca9458f760d7196b94bfdcf83b2178ea24/simde/arm/neon/cmla_rot90.h#L50-L52 (SIMDE_SHUFFLE_VECTOR_ is defined at https://github.com/simd-everywhere/simde/blob/7d0e2aca9458f760d7196b94bfdcf83b2178ea24/simde/simde-common.h#L278-L281) This is with 10.2.1-6 from Debian: /usr/bin/mips64el-linux-gnuabi64-gcc-10 --version mips64el-linux-gnuabi64-gcc-10 (Debian 10.2.1-6) 10.2.1 20210110 Copyright (C) 2020 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
next reply other threads:[~2021-05-26 1:41 UTC|newest] Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-26 1:41 evan@coeus-group.com [this message] 2021-06-19 7:36 ` [Bug target/100760] " xry111 at mengyan1223 dot wang 2021-07-09 6:29 ` cvs-commit at gcc dot gnu.org 2024-05-29 18:04 ` syq at gcc dot gnu.org
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