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From: "slyfox at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/100782] [11 Regression] sh4 ICEs on -O2 -fPIE
 -fstack-protector: internal compiler error: in curr_insn_transform, at
 lra-constraints.c:4132
Date: Mon, 09 Aug 2021 06:51:50 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D100782

--- Comment #6 from Sergei Trofimovich <slyfox at gcc dot gnu.org> ---
Trying to understand why rejection happens: -fdump-rtl-all-slim 295r.reload
says:

         Choosing alt 0 in insn 12:  (0) =3Dr  (1) %0  (2) rI08
{*addsi3_compact_lra}
            alt=3D0: No input/output reload -- refuse
         ...
         12: r15:SI=3Dr15:SI-0x4

I'm surprised the same (hard) reg is used in source and destination in insn=
 12.

*addsi3_compact_lra hints at special assumptions about it:

;; The *addsi3_compact is made an insn_and_split and accepts actually
;; impossible constraints to make LRA's register elimination work well on S=
H.
;; The problem is that LRA expects something like
;;    (set rA (plus rB (const_int N)))
;; to work.  We can do that, but we have to split out an additional reg-reg
;; copy or constant load before the actual add insn.
;; Use u constraint for that case to avoid the invalid value in the stack
;; pointer.
;; This also results in better code when LRA is not used.  However, we have
;; to use different sets of patterns and the order of these patterns is
;; important.
;; In some cases the constant zero might end up in operands[2] of the
;; patterns.  We have to accept that and convert it into a reg-reg move.
(define_insn_and_split "*addsi3_compact_lra"
  [(set (match_operand:SI 0 "arith_reg_dest" "=3Dr,&u")
        (plus:SI (match_operand:SI 1 "arith_reg_operand" "%0,r")
                 (match_operand:SI 2 "arith_or_int_operand" "rI08,rn")))]
  "TARGET_SH1 && sh_lra_p ()
   && (! reg_overlap_mentioned_p (operands[0], operands[1])
       || arith_operand (operands[2], SImode))"
  "@
        add     %2,%0
        #"
  "&& reload_completed
   && ! reg_overlap_mentioned_p (operands[0], operands[1])"
  [(set (match_dup 0) (match_dup 2))
   (set (match_dup 0) (plus:SI (match_dup 0) (match_dup 1)))]
{
  /* Prefer 'mov r0,r1; add #imm8,r1' over 'mov #imm8,r1; add r0,r1'  */
  if (satisfies_constraint_I08 (operands[2]))
    std::swap (operands[1], operands[2]);
}
  [(set_attr "type" "arith")])=