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From: "luoxhu at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/100866] PPC: Inefficient code for vec_revb(vector
 unsigned short) < P9
Date: Tue, 15 Jun 2021 09:56:37 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D100866

--- Comment #3 from luoxhu at gcc dot gnu.org ---

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 097a127be07..35b3f1a0e1a 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -1932,7 +1932,7 @@ (define_insn "altivec_vpku<VI_char>um_direct"
 }
   [(set_attr "type" "vecperm")])

-(define_insn "*altivec_vrl<VI_char>"
+(define_insn "altivec_vrl<VI_char>"
   [(set (match_operand:VI2 0 "register_operand" "=3Dv")
         (rotate:VI2 (match_operand:VI2 1 "register_operand" "v")
                    (match_operand:VI2 2 "register_operand" "v")))]
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 8c5865b8c34..88b34a2285a 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -5849,9 +5849,18 @@ (define_expand "revb_<mode>"
       /* Want to have the elements in reverse order relative
         to the endian mode in use, i.e. in LE mode, put elements
         in BE order.  */
-      rtx sel =3D swap_endian_selector_for_mode(<MODE>mode);
-      emit_insn (gen_altivec_vperm_<mode> (operands[0], operands[1],
-                                          operands[1], sel));
+      if (<MODE>mode =3D=3D V8HImode)
+       {
+         rtx splt =3D gen_reg_rtx (V8HImode);
+         emit_insn (gen_altivec_vspltish (splt, GEN_INT (8)));
+         emit_insn (gen_altivec_vrlh (operands[0], operands[1], splt));
+       }
+      else
+       {
+         rtx sel =3D swap_endian_selector_for_mode (<MODE> mode);
+         emit_insn (gen_altivec_vperm_<mode> (operands[0], operands[1],
+                                              operands[1], sel));
+       }
     }


With above change, it could generate the expected code:

revb:
.LFB0:
        .cfi_startproc
        vspltisw 0,8
        vrlw 2,2,0
        blr=