[Bug target/100885] New: [12 Regression] ICE: in extract_constrain_insn, at recog.c:2671: insn does not satisfy its constraints: {sse4_1_zero_extendv8qiv8hi2}

[Bug target/100885] New: [12 Regression] ICE: in extract_constrain_insn, at recog.c:2671: insn does not satisfy its constraints: {sse4_1_zero_extendv8qiv8hi2}

[zsojka at seznam dot cz]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100885

            Bug ID: 100885
           Summary: [12 Regression] ICE: in extract_constrain_insn, at
                    recog.c:2671: insn does not satisfy its constraints:
                    {sse4_1_zero_extendv8qiv8hi2}
           Product: gcc
           Version: 12.0
            Status: UNCONFIRMED
          Keywords: ice-on-valid-code
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: zsojka at seznam dot cz
  Target Milestone: ---
              Host: x86_64-pc-linux-gnu
            Target: x86_64-pc-linux-gnu

Created attachment 50912
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=50912&action=edit
auto-reduced testcase (from OpenTTD sources)

Compiler output:
$ x86_64-pc-linux-gnu-gcc -O2 -mavx512vl testcase.C
testcase.C: In instantiation of 'void Blitter_32bppSSE4_Anim::Draw(const
Blitter::BlitterParams*, ZoomLevel) [with BlitterMode <anonymous> =
BM_COLOUR_REMAP; Blitter_32bppSSE_Base::ReadMode <anonymous> =
Blitter_32bppSSE_Base::RM_WITH_MARGIN; Blitter_32bppSSE_Base::BlockType
<anonymous> = Blitter_32bppSSE_Base::BT_NONE; bool <anonymous> = true; bool
<anonymous> = false]':
testcase.C:154:62:   required from here
testcase.C:120:27: warning: cast to pointer from integer of different size
[-Wint-to-pointer-cast]
  120 |   Colour *src_rgba_line = (Colour *)sd->data;
      |                           ^~~~~~~~~~~~~~~~~~
testcase.C:130:19: warning: cast to pointer from integer of different size
[-Wint-to-pointer-cast]
  130 |       int mvX2 = *(unsigned *)sd->infos[zoom], m = byte(mvX2);
      |                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~
testcase.C: In member function 'void Blitter_32bppSSE4_Anim::Draw(const
Blitter::BlitterParams*, ZoomLevel) [with BlitterMode <anonymous> =
BM_COLOUR_REMAP; Blitter_32bppSSE_Base::ReadMode <anonymous> =
Blitter_32bppSSE_Base::RM_WITH_MARGIN; Blitter_32bppSSE_Base::BlockType
<anonymous> = Blitter_32bppSSE_Base::BT_NONE; bool <anonymous> = true; bool
<anonymous> = false]':
testcase.C:150:1: error: insn does not satisfy its constraints:
  150 | }
      | ^
(insn 295 221 134 12 (set (reg:V8HI 22 xmm2 [230])
        (zero_extend:V8HI (vec_select:V8QI (reg:V16QI 52 xmm16 [orig:134
__trans_tmp_5 ] [134])
                (parallel [
                        (const_int 0 [0])
                        (const_int 1 [0x1])
                        (const_int 2 [0x2])
                        (const_int 3 [0x3])
                        (const_int 4 [0x4])
                        (const_int 5 [0x5])
                        (const_int 6 [0x6])
                        (const_int 7 [0x7])
                    ])))) "testcase.C":49:46 4653 {sse4_1_zero_extendv8qiv8hi2}
     (expr_list:REG_DEAD (reg:V16QI 52 xmm16 [orig:134 __trans_tmp_5 ] [134])
        (nil)))
during RTL pass: cprop_hardreg
testcase.C:150:1: internal compiler error: in extract_constrain_insn, at
recog.c:2671
0x7ece3a _fatal_insn(char const*, rtx_def const*, char const*, int, char
const*)
        /repo/gcc-trunk/gcc/rtl-error.c:108
0x7ecec7 _fatal_insn_not_found(rtx_def const*, char const*, int, char const*)
        /repo/gcc-trunk/gcc/rtl-error.c:118
0x7dbaaf extract_constrain_insn(rtx_insn*)
        /repo/gcc-trunk/gcc/recog.c:2671
0x1292534 copyprop_hardreg_forward_1
        /repo/gcc-trunk/gcc/regcprop.c:825
0x129383e execute
        /repo/gcc-trunk/gcc/regcprop.c:1390
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.

$ x86_64-pc-linux-gnu-gcc -v
Using built-in specs.
COLLECT_GCC=/repo/gcc-trunk/binary-latest/bin/x86_64-pc-linux-gnu-gcc
COLLECT_LTO_WRAPPER=/repo/gcc-trunk/binary-trunk-r12-1164-20210602094549-g659cc7d6320-checking-yes-rtl-df-extra-amd64/bin/../libexec/gcc/x86_64-pc-linux-gnu/12.0.0/lto-wrapper
Target: x86_64-pc-linux-gnu
Configured with: /repo/gcc-trunk//configure --enable-languages=c,c++
--enable-valgrind-annotations --disable-nls --enable-checking=yes,rtl,df,extra
--with-cloog --with-ppl --with-isl --build=x86_64-pc-linux-gnu
--host=x86_64-pc-linux-gnu --target=x86_64-pc-linux-gnu
--with-ld=/usr/bin/x86_64-pc-linux-gnu-ld
--with-as=/usr/bin/x86_64-pc-linux-gnu-as --disable-libstdcxx-pch
--prefix=/repo/gcc-trunk//binary-trunk-r12-1164-20210602094549-g659cc7d6320-checking-yes-rtl-df-extra-amd64
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 12.0.0 20210602 (experimental) (GCC)

[Bug target/100885] [12 Regression] ICE: in extract_constrain_insn, at recog.c:2671: insn does not satisfy its constraints: {sse4_1_zero_extendv8qiv8hi2}

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100885

--- Comment #1 from Hongtao.liu <crazylht at gmail dot com> ---
152(define_register_constraint "Yw"
153 "TARGET_AVX512BW && TARGET_AVX512VL ? ALL_SSE_REGS : TARGET_SSE ? SSE_REGS
: NO_REGS"
154 "@internal Any EVEX encodable SSE register (@code{%xmm0-%xmm31}) for
AVX512BW with TARGET_AVX512VL target, otherwise any \
   SSE register.")


19076(define_insn "sse4_1_<code>v8qiv8hi2<mask_name>"
19077  [(set (match_operand:V8HI 0 "register_operand" "=Yr,*x,Yw")
19078        (any_extend:V8HI
19079          (vec_select:V8QI
19080            (match_operand:V16QI 1 "register_operand" "Yr,*x,Yw")
19081            (parallel [(const_int 0) (const_int 1)
19082                       (const_int 2) (const_int 3)
19083                       (const_int 4) (const_int 5)
19084                       (const_int 6) (const_int 7)]))))]
19085  "TARGET_SSE4_1 && <mask_avx512bw_condition> &&
<mask_avx512vl_condition>"
19086  "%vpmov<extsuffix>bw\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
19087  [(set_attr "isa" "noavx,noavx,avx")
19088   (set_attr "type" "ssemov")
19089   (set_attr "prefix_extra" "1")
19090   (set_attr "prefix" "orig,orig,maybe_evex")
19091   (set_attr "mode" "TI")])

With avx512vl Yw should be matched, and w/o avx512bw, only SSE_REGS should be
matched, why xmm16 is allocated?

[Bug target/100885] [12 Regression] ICE: in extract_constrain_insn, at recog.c:2671: insn does not satisfy its constraints: {sse4_1_zero_extendv8qiv8hi2}

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100885

--- Comment #2 from Hongtao.liu <crazylht at gmail dot com> ---

> With avx512vl Yw should be matched, and w/o avx512bw, only SSE_REGS should
> be matched, why xmm16 is allocated?

It didn't come from RA, but post_reload splitter.

18103(define_insn_and_split "*sse4_1_zero_extendv8qiv8hi2_3"
18104  [(set (match_operand:V16QI 0 "register_operand" "=Yr,*x,v")
18105        (vec_select:V16QI
18106          (vec_concat:V32QI
18107            (match_operand:V16QI 1 "vector_operand" "YrBm,*xBm,vm")
18108            (match_operand:V16QI 2 "const0_operand" "C,C,C"))
18109          (match_parallel 3 "pmovzx_parallel"
18110            [(match_operand 4 "const_int_operand" "n,n,n")])))]
18111  "TARGET_SSE4_1"

[Bug target/100885] [12 Regression] ICE: in extract_constrain_insn, at recog.c:2671: insn does not satisfy its constraints: {sse4_1_zero_extendv8qiv8hi2}

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100885

--- Comment #3 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to Hongtao.liu from comment #2)
> > With avx512vl Yw should be matched, and w/o avx512bw, only SSE_REGS should
> > be matched, why xmm16 is allocated?
> 
> It didn't come from RA, but post_reload splitter.
> 
> 18103(define_insn_and_split "*sse4_1_zero_extendv8qiv8hi2_3"
> 18104  [(set (match_operand:V16QI 0 "register_operand" "=Yr,*x,v")
> 18105        (vec_select:V16QI
> 18106          (vec_concat:V32QI
> 18107            (match_operand:V16QI 1 "vector_operand" "YrBm,*xBm,vm")
> 18108            (match_operand:V16QI 2 "const0_operand" "C,C,C"))
> 18109          (match_parallel 3 "pmovzx_parallel"
> 18110            [(match_operand 4 "const_int_operand" "n,n,n")])))]
> 18111  "TARGET_SSE4_1"

Need to adjust the third constraint from (v, vm, C, n) to (Yw, Ywm, C, n)

[Bug target/100885] [12 Regression] ICE: in extract_constrain_insn, at recog.c:2671: insn does not satisfy its constraints: {sse4_1_zero_extendv8qiv8hi2}

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100885

--- Comment #4 from Hongtao.liu <crazylht at gmail dot com> ---

> Need to adjust the third constraint from (v, vm, C, n) to (Yw, Ywm, C, n)

Also for those extend instructions which need AVX512VL is needed for
xmm16-xmm32.

[Bug target/100885] [12 Regression] ICE: in extract_constrain_insn, at recog.c:2671: insn does not satisfy its constraints: {sse4_1_zero_extendv8qiv8hi2}

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100885

--- Comment #5 from Hongtao.liu <crazylht at gmail dot com> ---
A patch is posted at
https://gcc.gnu.org/pipermail/gcc-patches/2021-June/571815.html

[Bug target/100885] [12 Regression] ICE: in extract_constrain_insn, at recog.c:2671: insn does not satisfy its constraints: {sse4_1_zero_extendv8qiv8hi2}

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100885

--- Comment #6 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuhongt@gcc.gnu.org>:

https://gcc.gnu.org/g:be5efe9c12cb852c788f74f8555e6ab8d755479b

commit r12-1254-gbe5efe9c12cb852c788f74f8555e6ab8d755479b
Author: liuhongt <hongtao.liu@intel.com>
Date:   Thu Jun 3 16:38:32 2021 +0800

    Fix ICE of insn does not satisfy its constraints.

    evex encoding vpmovzxbx needs both AVX512BW and AVX512VL which means
    constraint "Yw" should be used instead of constraint "v".

    gcc/ChangeLog:

            PR target/100885
            * config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3): Refine
            constraints.
            (<insn>v4siv4di2): Delete constraints for define_expand.

    gcc/testsuite/ChangeLog:

            PR target/100885
            * g++.target/i386/pr100885.C: New test.

[Bug target/100885] [12 Regression] ICE: in extract_constrain_insn, at recog.c:2671: insn does not satisfy its constraints: {sse4_1_zero_extendv8qiv8hi2}

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100885

--- Comment #7 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by hongtao Liu
<liuhongt@gcc.gnu.org>:

https://gcc.gnu.org/g:c064e787b10069e3de56bd3d0d1a34a1a09086ea

commit r11-8517-gc064e787b10069e3de56bd3d0d1a34a1a09086ea
Author: liuhongt <hongtao.liu@intel.com>
Date:   Thu Jun 3 16:38:32 2021 +0800

    Fix ICE of insn does not satisfy its constraints.

    evex encoding vpmovzxbx needs both AVX512BW and AVX512VL which means
    constraint "Yw" should be used instead of constraint "v".

    gcc/ChangeLog:

            PR target/100885
            * config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3): Refine
            constraints.
            (<insn>v4siv4di2): Delete constraints for define_expand.

    gcc/testsuite/ChangeLog:

            PR target/100885
            * g++.target/i386/pr100885.C: New test.

[Bug target/100885] [12 Regression] ICE: in extract_constrain_insn, at recog.c:2671: insn does not satisfy its constraints: {sse4_1_zero_extendv8qiv8hi2}

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100885

--- Comment #8 from Hongtao.liu <crazylht at gmail dot com> ---
Fixed in trunk.

[Bug target/100885] [12 Regression] ICE: in extract_constrain_insn, at recog.c:2671: insn does not satisfy its constraints: {sse4_1_zero_extendv8qiv8hi2}

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100885

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |12.0
         Resolution|---                         |FIXED
             Status|UNCONFIRMED                 |RESOLVED

--- Comment #9 from Richard Biener <rguenth at gcc dot gnu.org> ---
Fixed.

[Bug target/100885] [12 Regression] ICE: in extract_constrain_insn, at recog.c:2671: insn does not satisfy its constraints: {sse4_1_zero_extendv8qiv8hi2}

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100885

--- Comment #10 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by H.J. Lu <hjl@gcc.gnu.org>:

https://gcc.gnu.org/g:52730540e83c81ee595a51feb7736ff753c98139

commit r12-1261-g52730540e83c81ee595a51feb7736ff753c98139
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Mon Jun 7 07:29:31 2021 -0700

    x86: Update g++.target/i386/pr100885.C

    Since long is 32 bits for x32, update g++.target/i386/pr100885.C to cast
    __m64 to long long for x32.

            PR target/100885
            * g++.target/i386/pr100885.C (_mm_set_epi64): Cast __m64 to long
            long.

[Bug target/100885] [12 Regression] ICE: in extract_constrain_insn, at recog.c:2671: insn does not satisfy its constraints: {sse4_1_zero_extendv8qiv8hi2}

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100885

--- Comment #11 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by H.J. Lu <hjl@gcc.gnu.org>:

https://gcc.gnu.org/g:bcb5e97899e324c092806b49256a515593268a54

commit r11-8518-gbcb5e97899e324c092806b49256a515593268a54
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Mon Jun 7 07:29:31 2021 -0700

    x86: Update g++.target/i386/pr100885.C

    Since long is 32 bits for x32, update g++.target/i386/pr100885.C to cast
    __m64 to long long for x32.

            PR target/100885
            * g++.target/i386/pr100885.C (_mm_set_epi64): Cast __m64 to long
            long.

    (cherry picked from commit 52730540e83c81ee595a51feb7736ff753c98139)