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From: "crazylht at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/100885] [12 Regression] ICE: in extract_constrain_insn,
 at recog.c:2671: insn does not satisfy its constraints:
 {sse4_1_zero_extendv8qiv8hi2}
Date: Thu, 03 Jun 2021 05:10:13 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D100885

--- Comment #3 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to Hongtao.liu from comment #2)
> > With avx512vl Yw should be matched, and w/o avx512bw, only SSE_REGS sho=
uld
> > be matched, why xmm16 is allocated?
>=20
> It didn't come from RA, but post_reload splitter.
>=20
> 18103(define_insn_and_split "*sse4_1_zero_extendv8qiv8hi2_3"
> 18104  [(set (match_operand:V16QI 0 "register_operand" "=3DYr,*x,v")
> 18105        (vec_select:V16QI
> 18106          (vec_concat:V32QI
> 18107            (match_operand:V16QI 1 "vector_operand" "YrBm,*xBm,vm")
> 18108            (match_operand:V16QI 2 "const0_operand" "C,C,C"))
> 18109          (match_parallel 3 "pmovzx_parallel"
> 18110            [(match_operand 4 "const_int_operand" "n,n,n")])))]
> 18111  "TARGET_SSE4_1"

Need to adjust the third constraint from (v, vm, C, n) to (Yw, Ywm, C, n)=