[Bug target/101185] [12 Regression] pr96814.c failed after r12-1669 on non-avx512 platform

["ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101185

--- Comment #10 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Hongtao.liu from comment #9)
> (In reply to Jakub Jelinek from comment #8)
> > Yeah, ideally main including the cpuid check should be compiled with the
> > least possible target and if the check is successful call a noipa function
> > with the command line chosen attributes.
> > We've always been playing with fire here...
> 
> Yes, does this solution sound good to you, uros? If yes, please ignore my
> patch[1], I'll resend a new one.
> 
> [1]https://gcc.gnu.org/pipermail/gcc-patches/2021-June/573591.html

I'm afraid the above proposed solution would shift the burden from the compiler
to the user, and the burden does not justify relatively minor and solvable
issue to use generic "a & b" on masks.

IMO, using VxBI modes offer clear path to solution; VxBI move patterns and
logic insns should be trivial to implement, whereas more "esoteric" operations,
like shifts, unpacks and arithmetic, need some more though, since they don't
operate on vectors.

Another issue with current implementation is with DImode logic operations on
masks for 32-bit targets. ATM, they are simply disabled, e.g.:

(define_insn "*<code><mode>_1"
  [(set (match_operand:SWI248 0 "nonimmediate_operand" "=rm,r,?k")
        (any_or:SWI248
         (match_operand:SWI248 1 "nonimmediate_operand" "%0,0,k")
         (match_operand:SWI248 2 "<general_operand>" "r<i>,m,k")))
   (clobber (reg:CC FLAGS_REG))]

where

;; Single word integer modes without QImode.
(define_mode_iterator SWI248 [HI SI (DI "TARGET_64BIT")])

Please also note that mask operations do not clobber flags