From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 2B9E93858CDB; Wed, 24 May 2023 19:07:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 2B9E93858CDB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1684955244; bh=JXSVmJsRs9U15w5Y6dPYh78SEthew9hsM43ClbdBwyI=; h=From:To:Subject:Date:In-Reply-To:References:From; b=YrwWUl6aILXnMTDBnic0ULysiJrubo6icwv8urFP7b/YDtIrtqVApexrqR+52AvTa hoPVijXfMZY/UmKdXbP6ZdsJJiIYb4X09IQ36mng2HGykY17UBMdscmNjA4jBwQ4rk WdqNumOKdFTl55gkSKKM0Y3Ot4xQuQEj9GYENooM= From: "gjl at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/101188] [AVR] Miscompilation and function pointers Date: Wed, 24 May 2023 19:07:23 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 11.1.0 X-Bugzilla-Keywords: ra, wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: gjl at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: attachments.created Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D101188 --- Comment #6 from Georg-Johann Lay --- Created attachment 55152 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=3D55152&action=3Dedit diff testcase by v4.9.2 vs v5.2.1 Code from v4.9.2 is correct, but from v5.2.1 is bogus: --- fail1-4.9.2.sx 2023-05-24 17:20:46.508698338 +0200 +++ fail1-5.2.1.sx 2023-05-24 17:19:50.019976879 +0200 @@ -39,11 +39,11 @@ adiw r24,1 ; 13 addhi3_clobber/1 [length =3D 1] std Z+1,r25 ; 14 *movhi/4 [length =3D 2] st Z,r24 - adiw r30,2 ; 15 *addhi3/3 [length =3D 1] - movw r14,r16 ; 39 *movhi/1 [length =3D 1] - ldi r24,68 ; 16 addhi3_clobber/3 [length =3D 3] - add r14,r24 + movw r14,r16 ; 38 *movhi/1 [length =3D 1] + ldi r31,68 ; 15 addhi3_clobber/3 [length =3D 3] + add r14,r31 adc r15,__zero_reg__ + adiw r30,2 ; 17 *addhi3/3 [length =3D 1] ld __tmp_reg__,Z+ ; 18 *movhi/3 [length =3D 3] ld r31,Z mov r30,__tmp_reg__=