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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/101200] Unneeded AND after shift
Date: Thu, 24 Jun 2021 20:45:11 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D101200

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Note the tree level looks decent:
  a_6 =3D d.0_1 >> 4;
  f_7 =3D d.0_1 & 15;
  _2 =3D (int) f_7;
  _3 =3D (int) a_6;
  _4 =3D c.b[_2];
  c.b[_3] =3D _4;

Which gets expanded (for c.b[_3] and dependents) into:
(insn 5 4 0 (set (reg:QI 82 [ d.0_1 ])
        (mem/c:QI (symbol_ref:DI ("d") [flags 0x2]  <var_decl 0x7f83ad5babd0
d>) [0 d+0 S1 A8])) "t6.c":6:17 -1
     (nil))

.....
(insn 12 11 13 (parallel [
            (set (reg:QI 93 [ a ])
                (lshiftrt:QI (reg:QI 82 [ d.0_1 ])
                    (const_int 4 [0x4])))
            (clobber (reg:CC 17 flags))
        ]) "t6.c":6:17 -1
     (nil))

(insn 13 12 14 (set (reg:SI 94)
        (zero_extend:SI (reg:QI 93 [ a ]))) "t6.c":7:6 -1
     (nil))

(insn 14 13 15 (set (reg:DI 95)
        (sign_extend:DI (reg:SI 94))) "t6.c":7:10 -1
     (nil))

(insn 15 14 0 (set (mem:SI (plus:DI (mult:DI (reg:DI 95)
                    (const_int 4 [0x4]))
                (reg/f:DI 92)) [1 c.b[_3]+0 S4 A32])
        (reg:SI 85 [ _4 ])) "t6.c":7:10 -1
     (nil))

Part of the problem is tracking of QI vs DI modes.=