From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 6D2BA3858022; Fri, 25 Jun 2021 09:18:44 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 6D2BA3858022 From: "pinskia at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug testsuite/101206] New: [12 Regression] gcc.target/aarch64/vect-vmaxv.c and gcc.target/aarch64/vect-vaddv.c fail Date: Fri, 25 Jun 2021 09:18:44 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: testsuite X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: pinskia at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: bug_id short_desc product version bug_status bug_severity priority component assigned_to reporter target_milestone cf_gcctarget Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 25 Jun 2021 09:18:44 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D101206 Bug ID: 101206 Summary: [12 Regression] gcc.target/aarch64/vect-vmaxv.c and gcc.target/aarch64/vect-vaddv.c fail Product: gcc Version: 12.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: testsuite Assignee: unassigned at gcc dot gnu.org Reporter: pinskia at gcc dot gnu.org Target Milestone: --- Target: aarch64 These testcases fail: FAIL: gcc.target/aarch64/vect-vmaxv.c scan-assembler umaxv\\tb[0-9]+, v[0-9]+.16b FAIL: gcc.target/aarch64/vect-vmaxv.c scan-assembler uminv\\tb[0-9]+, v[0-9]+.16b FAIL: gcc.target/aarch64/vect-vaddv.c scan-assembler addv\\tb[0-9]+, v[0-9]+.16b But they are failing because the above instructions that were in the scan-assembler are now optimized away. They are optimized in *r.dse1 I have not looked into what revision caused t= hem to be optimized away though. But the generated code is correct.=