From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 86E8C389851E; Tue, 29 Jun 2021 05:24:29 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 86E8C389851E From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/101235] [11/12 Regression] Fails to bootstrap with binutils 2.32 Date: Tue, 29 Jun 2021 05:24:29 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 11.1.1 X-Bugzilla-Keywords: build X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: ASSIGNED X-Bugzilla-Resolution: X-Bugzilla-Priority: P1 X-Bugzilla-Assigned-To: linkw at gcc dot gnu.org X-Bugzilla-Target-Milestone: 11.2 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 29 Jun 2021 05:24:29 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D101235 --- Comment #5 from CVS Commits --- The releases/gcc-11 branch has been updated by Kewen Lin : https://gcc.gnu.org/g:f6306457ee386a9cae9b08e35ce160af0566b9f9 commit r11-8661-gf6306457ee386a9cae9b08e35ce160af0566b9f9 Author: Kewen Lin Date: Tue Jun 22 23:09:30 2021 -0500 rs6000: Fix typos in float128 ISA3.1 support The recent float128 ISA3.1 support (r12-1340) has some typos, it makes the libgcc build fail if it's with one binutils (assembler) which doesn't support Power10 insns. The error looks like: Error: invalid switch -mpower10 Error: unrecognized option -mpower10 ... [...libgcc/shared-object.mk:14: float128-p10.o] Error 1 What this patch does are: - fix test target typo libgcc_cv_powerpc_3_1_float128_hw (written wrongly as libgcc_cv_powerpc_float128_hw, so it's going to build ISA3.1 stuffs just when detecting ISA3.0). - fix test used for libgcc_cv_powerpc_3_1_float128_hw check. - fix test option used for libgcc_cv_powerpc_3_1_float128_hw check. - remove the ISA3.1 related contents from t-float128-hw. - add new macro FLOAT128_HW_INSNS_ISA3_1 to differentiate ISA3.1 content from ISA3.0 part in ifunc support. Bootstrapped/regtested on: - powerpc64le-linux-gnu P10 - powerpc64le-linux-gnu P9 (w/i and w/o p10 supported as) - powerpc64-linux-gnu P8 (w/i and w/o p10 supported as) libgcc/ChangeLog: PR target/101235 * configure: Regenerate. * configure.ac (test for libgcc_cv_powerpc_3_1_float128_hw): Fix typos among the name, CFLAGS and the test. * config/rs6000/t-float128-hw (fp128_3_1_hw_funcs, fp128_3_1_hw_src, fp128_3_1_hw_static_obj, fp128_3_1_hw_shared_obj, fp128_3_1_hw_obj): Remove. * config/rs6000/t-float128-p10-hw (FLOAT128_HW_INSNS): Append macro FLOAT128_HW_INSNS_ISA3_1. (FP128_3_1_CFLAGS_HW): Fix option typo. * config/rs6000/float128-ifunc.c (SW_OR_HW_ISA3_1): Guard this = with FLOAT128_HW_INSNS_ISA3_1. (__floattikf_resolve): Likewise. (__floatuntikf_resolve): Likewise. (__fixkfti_resolve): Likewise. (__fixunskfti_resolve): Likewise. (__floattikf): Likewise. (__floatuntikf): Likewise. (__fixkfti): Likewise. (__fixunskfti): Likewise. (cherry picked from commit 47749c43acb460ac8f410ee599616d1860ee5a35)=