[Bug tree-optimization/101260] [10/11 Regression] Backport 27381e78925 to GCC 11

["stefansf at linux dot ibm.com" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101260

--- Comment #8 from Stefan Schulze Frielinghaus <stefansf at linux dot ibm.com> ---
Pass split2 transforms

(insn 218 222 114 15 (set (reg/v:TI 10 %r10 [orig:87 a ] [87])
        (reg/v:TI 18 %f4 [orig:87 a ] [87])) 1466 {movti}
     (nil))

into

(insn 234 222 235 15 (set (reg:DI 10 %r10 [ a ])
        (reg:DI 18 %f4)) 1467 {*movdi_64}
     (nil))
(insn 235 234 114 15 (set (reg:DI 11 %r11 [orig:87 a+8 ] [87])
        (unspec:DI [
                (reg:V2DI 18 %f4)
                (const_int 1 [0x1])
            ] UNSPEC_VEC_EXTRACT)) 495 {*vec_extractv2di}
     (nil))

which is then transformed by cprop_hardreg into

(insn 234 222 235 14 (set (reg:DI 10 %r10 [ a ])
        (reg:DI 11 %r11 [18])) 1467 {*movdi_64}
     (expr_list:REG_DEAD (reg:DI 11 %r11 [18])                                 
                                                                               
                                      (nil)))
(insn 235 234 114 14 (set (reg:DI 11 %r11 [orig:87 a+8 ] [87])
        (unspec:DI [
                (reg:V2DI 18 %f4)
                (const_int 1 [0x1])
            ] UNSPEC_VEC_EXTRACT)) 495 {*vec_extractv2di}
     (expr_list:REG_DEAD (reg:V2DI 18 %f4)
        (nil)))

where in insn 234 register f4 is substituted by r11 which is wrong. This can
also be observed in the final assembler output:

vlvgp   %v4,%r10,%r11
l       %r2,12(%r1)
ahi     %r2,-1
st      %r2,12(%r1)
cijhe   %r2,0,.L13
lgr     %r10,%r11   // (*)
vlgvg   %r11,%v4,1

Registers r10 and r11 are moved into v4. The inverse move from v4 into r10 and
r11 is broken since cprop_hardreg wrongly substitutes f4 by r11. Thus the
expected output for (*) is:

lgdr    %r10,%f4