[Bug c/101346] New: ICE: maximum number of generated reload insns per insn achieved (90)

[Bug c/101346] New: ICE: maximum number of generated reload insns per insn achieved (90)

[gscfq@t-online.de]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101346

            Bug ID: 101346
           Summary: ICE: maximum number of generated reload insns per insn
                    achieved (90)
           Product: gcc
           Version: 12.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
          Assignee: unassigned at gcc dot gnu.org
          Reporter: gscfq@t-online.de
  Target Milestone: ---

Affects versions down to at least r5 :


$ cat z1.c
_Decimal128
foo (_Decimal128 x)
{
  return - __builtin_fabsd128 (x);
}


$ gcc-12-20210704 -c z1.c -O0 -m32 -fprofile-generate
during RTL pass: reload
z1.c: In function 'foo':
z1.c:5:1: internal compiler error: maximum number of generated reload insns per
insn achieved (90)
    5 | }
      | ^
0xa84c98 lra_constraints(bool)
        ../../gcc/lra-constraints.c:5091
0xa72932 lra(_IO_FILE*)
        ../../gcc/lra.c:2336
0xa2d499 do_reload
        ../../gcc/ira.c:5822
0xa2d499 execute
        ../../gcc/ira.c:6008

[Bug c/101346] ICE: maximum number of generated reload insns per insn achieved (90)

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101346

--- Comment #1 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to G. Steinmetz from comment #0)

> $ gcc-12-20210704 -c z1.c -O0 -m32 -fprofile-generate

Also needs -msse.

It looks that:

(insn 38 37 39 6 (set (subreg:SI (reg:TD 83 [ _2 ]) 0)
        (subreg:SI (reg:TD 82 [ _1 ]) 0)) "pr101346.c":4:10 75
{*movsi_internal}
     (nil))

causes reload loop.

[Bug target/101346] ICE: maximum number of generated reload insns per insn achieved (90)

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101346

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Assignee|unassigned at gcc dot gnu.org      |ubizjak at gmail dot com
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2021-07-15
             Status|UNCONFIRMED                 |ASSIGNED

--- Comment #2 from Uroš Bizjak <ubizjak at gmail dot com> ---
Created attachment 51155
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=51155&action=edit
Proposed patch

ix86_hard_regno_mode_ok allows TDmode values in general registers, but 32bit
targets do not support 128bit values in general registers natively.

Also allow TDmode values in SSE registers.

[Bug target/101346] ICE: maximum number of generated reload insns per insn achieved (90)

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101346

--- Comment #3 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Uros Bizjak <uros@gcc.gnu.org>:

https://gcc.gnu.org/g:f364cdffa47af574f90f671b2dcf5afa91442741

commit r12-2340-gf364cdffa47af574f90f671b2dcf5afa91442741
Author: Uros Bizjak <ubizjak@gmail.com>
Date:   Thu Jul 15 22:34:25 2021 +0200

    i386: Fix ix86_hard_regno_mode_ok for TDmode on 32bit targets [PR101346]

    General regs on 32bit targets do not support 128bit modes,
    including TDmode.

    gcc/

    2021-07-15  Uroš Bizjak  <ubizjak@gmail.com>

            PR target/101346
            * config/i386/i386.h (VALID_SSE_REG_MODE): Add TDmode.
            (VALID_INT_MODE_P): Add SDmode and DDmode.
            Add TDmode for TARGET_64BIT.
            (VALID_DFP_MODE_P): Remove.
            * config/i386/i386.c (ix86_hard_regno_mode_ok):
            Do not use VALID_DFP_MODE_P.

    gcc/testsuite/

    2021-07-15  Uroš Bizjak  <ubizjak@gmail.com>

            PR target/101346
            * gcc.target/i386/pr101346.c: New test.