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From: "ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/101346] ICE: maximum number of generated reload insns
 per insn achieved (90)
Date: Thu, 15 Jul 2021 09:47:55 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D101346

Uro=C5=A1 Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Assignee|unassigned at gcc dot gnu.org      |ubizjak at gmail do=
t com
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2021-07-15
             Status|UNCONFIRMED                 |ASSIGNED

--- Comment #2 from Uro=C5=A1 Bizjak <ubizjak at gmail dot com> ---
Created attachment 51155
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=3D51155&action=3Dedit
Proposed patch

ix86_hard_regno_mode_ok allows TDmode values in general registers, but 32bit
targets do not support 128bit values in general registers natively.

Also allow TDmode values in SSE registers.=