[Bug target/101384] [9/10/12 Regression] wrong code at -Og and above with vector shift/multiply

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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101384

--- Comment #10 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jakub Jelinek <jakub@gcc.gnu.org>:

https://gcc.gnu.org/g:e0e82856d535f56c916382f892ed2435dde54d4d

commit r12-2416-ge0e82856d535f56c916382f892ed2435dde54d4d
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Tue Jul 20 17:26:10 2021 +0200

    rs6000: Fix up easy_vector_constant_msb handling [PR101384]

    The following gcc.dg/pr101384.c testcase is miscompiled on
    powerpc64le-linux.
    easy_altivec_constant has code to try construct vector constants with
    different element sizes, perhaps different from CONST_VECTOR's mode.  But
as
    written, that works fine for vspltis[bhw] cases, but not for the vspltisw
    x,-1; vsl[bhw] x,x,x case, because that creates always a V16QImode,
V8HImode
    or V4SImode constant containing broadcasted constant with just the MSB set.
    The vspltis_constant function etc. expects the vspltis[bhw] instructions
    where the small [-16..15] or even [-32..30] constant is sign-extended to
the
    remaining step bytes, but that is not the case for the 0x80...00 constants,
    with step > 1 we can't handle e.g.
    { 0x80, 0xff, 0xff, 0xff, 0x80, 0xff, 0xff, 0xff, 0x80, 0xff, 0xff, 0xff,
0x80, 0xff, 0xff, 0xff }
    vectors but do want to handle e.g.
    { 0, 0, 0, 0x80, 0, 0, 0, 0x80, 0, 0, 0, 0x80, 0, 0, 0, 0x80 }
    and similarly with copies > 1 we do want to handle e.g.
    { 0x80808080, 0x80808080, 0x80808080, 0x80808080 }.

    2021-07-20  Jakub Jelinek  <jakub@redhat.com>

            PR target/101384
            * config/rs6000/rs6000-protos.h (easy_altivec_constant): Change
return
            type from bool to int.
            * config/rs6000/rs6000.c (vspltis_constant): Fix up handling the
            EASY_VECTOR_MSB case if either step or copies is not 1.
            (vspltis_shifted): Fix comment typo.
            (easy_altivec_constant): Change return type from bool to int,
instead
            of returning true return byte size of the element mode that should
be
            used to synthetize the constant.
            * config/rs6000/predicates.md (easy_vector_constant_msb): Require
            that vspltis_shifted is 0, handle the case where
easy_altivec_constant
            assumes using different vector mode from CONST_VECTOR's mode.
            * config/rs6000/altivec.md (easy_vector_constant_msb splitter): Use
            easy_altivec_constant to determine mode in which -1 >> -1 should be
            performed, use rs6000_expand_vector_init instead of
gen_vec_initv4sisi.

            * gcc.dg/pr101384.c: New test.
            * gcc.target/powerpc/pr101384-1.c: New test.
            * gcc.target/powerpc/pr101384-2.c: New test.