From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id E68A9384F01C; Mon, 30 May 2022 20:28:28 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E68A9384F01C From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/101617] a ? -1 : 1 -> (-(type)a) | 1 Date: Mon, 30 May 2022 20:28:28 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: enhancement X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: ASSIGNED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: pinskia at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 30 May 2022 20:28:29 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D101617 --- Comment #9 from CVS Commits --- The master branch has been updated by Roger Sayle : https://gcc.gnu.org/g:f1652e3343b1ec47035370801d9b9aca1f8b613f commit r13-857-gf1652e3343b1ec47035370801d9b9aca1f8b613f Author: Roger Sayle Date: Mon May 30 21:26:37 2022 +0100 PR rtl-optimization/101617: Use neg/sbb in ix86_expand_int_movcc. This patch resolves PR rtl-optimization/101617 where we should generate the exact same code for (X ? -1 : 1) as we do for ((X ? -1 : 0) | 1). The cause of the current difference on x86_64 is actually in ix86_expand_int_movcc that doesn't know that negl;sbbl can be used to create a -1/0 result depending on whether the input is zero/nonzero. So for Andrew Pinski's test case: int f1(int i) { return i ? -1 : 1; } GCC currently generates: f1: cmpl $1, %edi sbbl %eax, %eax // x ? 0 : -1 andl $2, %eax // x ? 0 : 2 subl $1, %eax // x ? -1 : 1 ret but with the attached patch, now generates: f1: negl %edi sbbl %eax, %eax // x ? -1 : 0 orl $1, %eax // x ? -1 : 1 ret To implement this I needed to add two expanders to i386.md to generate the required instructions (in both SImode and DImode) matching the pre-existing define_insns of the same name. 2022-05-30 Roger Sayle gcc/ChangeLog PR rtl-optimization/101617 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Add a special case (indicated by negate_cc_compare_p) to generate a -1/0 mask using neg;sbb. * config/i386/i386.md (x86_neg_ccc): New define_expand to generate an *x86_neg_ccc instruction. (x86_movcc_0_m1_neg): Likewise, a new define_expand to generate a *x86_movcc_0_m1_neg instruction. gcc/testsuite/ChangeLog PR rtl-optimization/101617 * gcc.target/i386/pr101617.c: New test case.=