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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/101641] Bogus redundant store removal
Date: Tue, 28 Sep 2021 10:20:29 +0000	[thread overview]
Message-ID: <bug-101641-4-umVQ34SIws@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-101641-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101641

--- Comment #7 from Richard Biener <rguenth at gcc dot gnu.org> ---
Wow, and this time it's even combine coming into play!

(insn 10 9 11 2 (set (reg/v:DI 82 [ xy ])
        (mem/j:DI (reg/v/f:DI 86 [ pu ]) [2 pu_6(D)->y+0 S8 A64])) "t.i":12:8
76 {*movdi_internal}
     (nil))
(insn 11 10 12 2 (set (mem/j:DI (reg/v/f:DI 86 [ pu ]) [2 pu_6(D)->x+0 S8 A64])
        (reg/v:DI 82 [ xy ])) "t.i":13:9 76 {*movdi_internal}
     (expr_list:REG_DEAD (reg/v/f:DI 86 [ pu ])
        (expr_list:REG_DEAD (reg/v:DI 82 [ xy ])
            (nil))))

Trying 10 -> 11:
   10: r82:DI=[r86:DI]
   11: [r86:DI]=r82:DI
      REG_DEAD r86:DI
      REG_DEAD r82:DI
Failed to match this instruction:
(set (mem/j:DI (reg/v/f:DI 86 [ pu ]) [2 pu_6(D)->x+0 S8 A64])
    (mem/j:DI (reg/v/f:DI 86 [ pu ]) [2 pu_6(D)->y+0 S8 A64]))
allowing combination of insns 10 and 11
original costs 4 + 4 = 8
replacement cost 4
deferring deletion of insn with uid = 10.
modifying insn i3    11: [r86:DI]=[r86:DI]
      REG_DEAD r86:DI
deferring rescan insn with uid = 11.

Trying 4 -> 11:
    4: r86:DI=r91:DI
      REG_DEAD r91:DI
   11: [r86:DI]=[r86:DI]
      REG_DEAD r86:DI
Failed to match this instruction:
(set (mem/j:DI (reg:DI 91) [2 pu_6(D)->x+0 S8 A64])
    (mem/j:DI (reg:DI 91) [2 pu_6(D)->y+0 S8 A64]))
allowing combination of insns 4 and 11
original costs 4 + 4 = 8
replacement cost 4
deferring deletion of insn with uid = 4.
modifying insn i3    11: [r91:DI]=[r91:DI]
      REG_DEAD r91:DI
deferring rescan insn with uid = 11.
deleting noop move 11


somewhere inside combine we'd have to realize that this isn't a noop move
and then maybe not allow the combination in the first place since it
isn't recognizable?  That is, somehow we must anticipate the removal,
I suppose it is via

  /* Recognize all noop sets, these will be killed by followup pass.  */
  if (insn_code_number < 0 && GET_CODE (pat) == SET && set_noop_p (pat))
    insn_code_number = NOOP_MOVE_INSN_CODE, num_clobbers_to_add = 0;

where set_noop_p for two MEMs simply dispatches to
rtx_equal_p && !side_effects_p.

Note on RTL we see that we cannot rely on MEM_ALIAS_SET but have to
use MEM_EXPR to conservatively assess that the access is _not_ through
a union ... (or as said we could annotate the alias set entry as to
belonging to a union).


In the end how we handle TBAA and unions might not be the very best way
(but I can't offer something better yet).

      parent reply	other threads:[~2021-09-28 10:20 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-27 12:03 [Bug tree-optimization/101641] New: " rguenth at gcc dot gnu.org
2021-07-27 12:08 ` [Bug tree-optimization/101641] " rguenth at gcc dot gnu.org
2021-07-29  8:09 ` rguenth at gcc dot gnu.org
2021-07-29  8:55 ` rguenth at gcc dot gnu.org
2021-07-29  9:07 ` rguenth at gcc dot gnu.org
2021-07-29 18:04 ` muecker at gwdg dot de
2021-09-10  8:05 ` rguenth at gcc dot gnu.org
2021-09-28 10:20 ` rguenth at gcc dot gnu.org [this message]

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