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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug rtl-optimization/101693] Terrible SIMD register allocation with
 a tight loop operating on 8 registers.
Date: Mon, 02 Aug 2021 08:12:35 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D101693

--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
Created attachment 51238
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=3D51238&action=3Dedit
your testcase

Attached the testcase for reference.  The odd thing is there's nothing
apperantly wrong with what we feed to the RA, but eventually we're confused
about the UNSPEC
way of encoding vpmaddubswaccd so the RA doesn't see it can coalesce the
accumulators and its result.

(insn 43 42 45 3 (set (reg:V8SI 164)
        (unspec:V8SI [
                (subreg:V8SI (reg:V4DI 89 [ regs__I_lsm.13 ]) 0)
                (reg:V8SI 116 [ _127 ])
                (mem:V8SI (plus:DI (reg:DI 84 [ ivtmp.26 ])
                        (const_int 6144 [0x1800])) [0 MEM[(const __m256i *
{ref-all})_147 + 6144B]+0 S32 A256])
            ] UNSPEC_VPMADDUBSWACCD)) "Compiler Explorer C++ Editor #[object
Object] Code.cpp":13:11 6082 {vpdpbusd_v8si}
     (expr_list:REG_DEAD (reg:V4DI 89 [ regs__I_lsm.13 ])
        (nil)))=