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From: "crazylht at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug middle-end/102133] [12 Regression] ICE in set_rtl building
 libgcc __muldc3 for 32-bit SPARC
Date: Tue, 31 Aug 2021 02:49:13 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D102133

--- Comment #5 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to Hongtao.liu from comment #4)
> >=20
> > and it hit REG_P (XEXP (x, 1)), XEXP (x, 1) is invalid for subreg, so
> > set_rtl  here doesn't accept subreg?
>=20
> typo, it hit gcc_assert that if X is not REG, it must be CONCAT or PARALL=
EL,
> but here is SUBREG, so gcc_assert failed.

in extract_bit_bitfield_1
target: (reg/v:DF 153)
op0: (mem/c:DF (plus:SI (reg/f:SI 103 virtual-incoming-args)
        (const_int 24 [0x18])) [1 d+0 S8 A32])


in good case, it will move op0 to target by 2 32-bit loads

---cut from  extract_integral_bit_field-----

  /* Handle fields bigger than a word.  */

  if (bitsize > BITS_PER_WORD)
    {
      /* Here we transfer the words of the field
         in the order least significant first.
         This is because the most significant word is the one which may
         be less than full.  */
--------cut end-------

after my changed, it will return (subreg:DF (reg: DI 0))=