From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id AEEA7385841E; Wed, 1 Sep 2021 07:33:46 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AEEA7385841E From: "ubizjak at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/102143] ABI incompatibility with clang when passing 32bit vectors on 32bit i686 Date: Wed, 01 Sep 2021 07:33:46 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: ABI X-Bugzilla-Severity: normal X-Bugzilla-Who: ubizjak at gmail dot com X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 Sep 2021 07:33:46 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D102143 --- Comment #5 from Uro=C5=A1 Bizjak --- (In reply to Uro=C5=A1 Bizjak from comment #3) > gcc has also some problems in this area. With -mregparm=3D3, one would ex= pect > arguments obeying integer ABI to be passed in registers, but regparm flag > has no effect and the same code is produced: >=20 > foo: > movd 4(%esp), %xmm0 > movd 8(%esp), %xmm1 > paddw %xmm1, %xmm0 > movd %xmm0, %eax > ret (sorry, sent the message too fast) However, with -mno-sse -mregparm=3D3, regparm does have effect and produces: foo: leal (%eax,%edx), %ecx sarl $16, %eax sarl $16, %edx addl %eax, %edx movzwl %cx, %eax sall $16, %edx orl %edx, %eax ret vs -mno-sse -mregparm=3D0: foo: movl 4(%esp), %edx movl 8(%esp), %ecx leal (%edx,%ecx), %eax sarl $16, %edx sarl $16, %ecx addl %ecx, %edx movzwl %ax, %eax sall $16, %edx orl %edx, %eax ret=