From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 807623850428; Thu, 27 Jan 2022 16:28:25 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 807623850428 From: "crazylht at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/102178] [12 Regression] SPECFP 2006 470.lbm regressions on AMD Zen CPUs after r12-897-gde56f95afaaa22 Date: Thu, 27 Jan 2022 16:28:25 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: missed-optimization, ra X-Bugzilla-Severity: normal X-Bugzilla-Who: crazylht at gmail dot com X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P1 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 12.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 27 Jan 2022 16:28:25 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D102178 --- Comment #24 from Hongtao.liu --- for vmovq %rdi, %xmm7 # 503 [c=3D4 l=3D4] *movdf_internal/21 .. vmulsd %xmm7, %xmm4, %xmm5 # 320 [c=3D12 l=3D4] *fop_df_comm/2 .. movabsq $0x3fef85af6c69b5a6, %rdi # 409 [c=3D5 l=3D10]=20 *movdf_internal/11 and=20 7806(insn 320 319 322 8 (set (reg:DF 441) 7807 (mult:DF (reg:DF 166 [ _323 ]) 7808 (reg:DF 249 [ _900 ]))) "../test.c":87:218 1072 {*fop_df_co= mm} 7809 (expr_list:REG_DEAD (reg:DF 249 [ _900 ]) 7810 (nil))) RA allocate rdi for 249 because cost of general reg is cheaper than mem. a66(r249,l1) costs: AREG:5964,5964 DREG:5964,5964 CREG:5964,5964 BREG:5964,5964 SIREG:5964,5964 DIREG:5964,5964 AD_REGS:5964,5964 CLOBBERED_REGS:5964,5964 Q_REGS:5964,5964 NON_Q_REGS:5964,5964 TLS_GOTBASE_REGS:5964,5964 GENERAL_REGS:5964,5964 FP_TOP_REG:19546,19546 FP_SECOND_REG:19546,19546 FLOAT_REGS:19546,19546 SSE_FIRST_REG:0,0 NO_REX_SSE_REGS:0,0 SSE_REGS:0,0 FLOAT_SSE_REGS:19546,19546 FLOAT_INT_REGS:19546,19546 INT_SSE_REGS:19546,19546 FLOAT_INT_SSE_REGS:19546,19546 MEM:6294,6294 950 r249: preferred SSE_REGS, alternative GENERAL_REGS, allocno INT_SSE_REGS Disposition: 66:r249 l1 5 with -mtune=3Daldlake, for r249 cost of general regs is expensive than mem,= and RA will allocate mem for it, then no more movabsq/vmovq is needed. 655 a66(r249,l1) costs: AREG:5964,5964 DREG:5964,5964 CREG:5964,5964 BREG:5964,5964 SIREG:5964,5964 DIREG:5964,5964 AD_REGS:5964,5964 CLOBBERED_REGS:5964,5964 Q_REGS:5964,5964 NO\ N_Q_REGS:5964,5964 TLS_GOTBASE_REGS:5964,5964 GENERAL_REGS:5964,5964 FP_TOP_REG:14908,14908 FP_SECOND_REG:14908,14908 FLOAT_REGS:14908,14908 SSE_FIRST_REG:0,0 NO_REX_SSE_REGS:0\ ,0 SSE_REGS:0,0 FLOAT_SSE_REGS:14908,14908 FLOAT_INT_REGS:14908,14908 INT_SSE_REGS:14908,14908 FLOAT_INT_SSE_REGS:14908,14908 MEM:5632,5632 950 r249: preferred SSE_REGS, alternative NO_REGS, allocno SSE_REGS 66:r249 l1 mem vmulsd -80(%rsp), %xmm2, %xmm3 # 320 [c=3D29 l=3D6] *fop_df_comm/2 Guess we need to let RA know mem cost is cheaper than GPR for r249.=