From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 680553857803; Wed, 1 Dec 2021 07:46:45 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 680553857803 From: "luoxhu at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/102239] powerpc suboptimal boolean test of contiguous bits Date: Wed, 01 Dec 2021 07:46:45 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 11.2.1 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: luoxhu at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 Dec 2021 07:46:45 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D102239 --- Comment #11 from luoxhu at gcc dot gnu.org --- +(define_insn_and_split "*anddi3_insn_dot" + [(set (pc) + (if_then_else (eq (and:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r") + (match_operand:DI 2 "const_int_operand" "n,n"= )) + (const_int 0)) + (label_ref (match_operand 3 "")) + (pc))) + (clobber (match_scratch:DI 0 "=3Dr,r"))] + "rs6000_is_valid_2insn_and (operands[2], DImode) + && !(rs6000_is_valid_and_mask (operands[2], DImode) + || logical_const_operand (operands[2], DImode))" + "#" + "&& reload_completed" + [(pc)] +{ + int nb, ne; + if (rs6000_is_valid_mask (operands[2], &nb, &ne, DImode) && nb >=3D ne) + { + unsigned HOST_WIDE_INT val =3D INTVAL (operands[2]); + int shift =3D 63 - nb; + rtx tmp =3D gen_rtx_ASHIFT (DImode, operands[1], GEN_INT (shift)); + tmp =3D gen_rtx_AND (DImode, tmp, GEN_INT (val << shift)); + rtx cr0 =3D gen_rtx_REG (CCmode, CR0_REGNO); + rs6000_emit_dot_insn (operands[0], tmp, 1, cr0); + rtx loc_ref =3D gen_rtx_LABEL_REF (VOIDmode, operands[3]); + rtx cond =3D gen_rtx_EQ (CCEQmode, cr0, const0_rtx); + rtx ite =3D gen_rtx_IF_THEN_ELSE (VOIDmode, cond, loc_ref, pc_rtx); + emit_jump_insn (gen_rtx_SET (pc_rtx, ite)); + DONE; + } + else + FAIL; +} + [(set_attr "type" "shift") + (set_attr "dot" "yes") + (set_attr "length" "8,12")]) + This pattern could combine the two instructions from 9: {r123:CC=3Dcmp(r124:DI&0x600000000,0);clobber scratch;} REG_DEAD r124:DI 10: pc=3D{(r123:CC=3D=3D0)?L15:pc} REG_DEAD r123:CC to: 10: {pc=3D{(r124:DI&0x600000000=3D=3D0)?L15:pc};clobber scratch;} then split2 will split it to one rotate dot instruction, is this OK? (insn 32 9 33 2 (parallel [ (set (reg:CC 100 0) (compare:CC (and:DI (ashift:DI (reg:DI 3 3 [124]) (const_int 29 [0x1d])) (const_int -4611686018427387904 [0xc000000000000000= ])) (const_int 0 [0]))) (clobber (reg:DI 3 3 [125])) ]) "pr102239.c":4:6 239 {*rotldi3_mask_dot} (nil)) (jump_insn 33 32 11 2 (set (pc) (if_then_else (eq:CCEQ (reg:CC 100 0) (const_int 0 [0])) (label_ref 15) (pc))) "pr102239.c":4:6 869 {*cbranch} (int_list:REG_BR_PROB 536870916 (nil)) -> 15)=