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From: "crazylht at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/102543] -march=cascadelake performs odd alignment peeling
Date: Fri, 08 Oct 2021 09:49:03 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D102543

--- Comment #4 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to Hongtao.liu from comment #3)
> (In reply to Richard Biener from comment #2)
> > Caused by
> >=20
> > commit 001e73373e6d2e7c756141e0d7ac8e24ae1574ad
> > Author: Sergey Shalnov <Sergey.Shalnov@intel.com>
> > Date:   Thu Feb 8 23:31:15 2018 +0100
> >=20
> >     re PR target/83008 ([performance] Is it better to avoid extra
> > instructions in data passing between loops?)
> >=20=20=20=20=20
> >             PR target/83008
> >             * config/i386/x86-tune-costs.h (skylake_cost): Fix cost of
> >             storing integer register in SImode.  Fix cost of 256 and 512
> >             byte aligned SSE register store.
Revert change in skylake_cost, still pass pr83008.c, guess it's fixed by so=
me
other patch?=