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From: "hjl.tools at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug middle-end/102566] [i386] GCC should emit LOCK BTS for simple
 bit-test-and-set operations with std::atomic
Date: Wed, 18 Jan 2023 18:49:40 +0000
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X-Bugzilla-Keywords: missed-optimization
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D102566

--- Comment #36 from H.J. Lu <hjl.tools at gmail dot com> ---
(1 << (x)) works, but (((unsigned int) 1) << (x)) doesn't work:

[hjl@gnu-skx-1 gcc]$ cat bar.c
void bar (void);

#define MASK1(x) (1 << (x))

void
f1 (unsigned int *a, unsigned int bit)
{
  if ((__atomic_fetch_xor (a, MASK1 (bit), __ATOMIC_RELAXED) & MASK1 (bit)))
    bar ();
}

#define MASK2(x) (((unsigned int) 1) << (x))

void
f2 (unsigned int *a, unsigned int bit)
{
  if ((__atomic_fetch_xor (a, MASK2 (bit), __ATOMIC_RELAXED) & MASK2 (bit)))
    bar ();
}
[hjl@gnu-skx-1 gcc]$ ./xgcc -B./ -S -O2 bar.c
[hjl@gnu-skx-1 gcc]$ cat bar.s
        .file   "bar.c"
        .text
        .p2align 4
        .globl  f1
        .type   f1, @function
f1:
.LFB0:
        .cfi_startproc
        lock btcl       %esi, (%rdi)
        jc      .L4
        ret
        .p2align 4,,10
        .p2align 3
.L4:
        jmp     bar
        .cfi_endproc
.LFE0:
        .size   f1, .-f1
        .p2align 4
        .globl  f2
        .type   f2, @function
f2:
.LFB1:
        .cfi_startproc
        movl    %esi, %ecx
        movl    $1, %edx
        movl    (%rdi), %eax
        sall    %cl, %edx
.L6:
        movl    %eax, %r8d
        movl    %eax, %esi
        xorl    %edx, %r8d
        lock cmpxchgl   %r8d, (%rdi)
        jne     .L6
        btl     %ecx, %esi
        jc      .L10
        ret
        .p2align 4,,10
        .p2align 3
.L10:
        jmp     bar
        .cfi_endproc
.LFE1:
        .size   f2, .-f2
        .ident  "GCC: (GNU) 13.0.1 20230118 (experimental)"
        .section        .note.GNU-stack,"",@progbits
[hjl@gnu-skx-1 gcc]$=