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Subject: [Bug target/102811] vcvtph2ps and vcvtps2ph should be used to
 convert _Float16 to SFmode with -mf16c
Date: Mon, 29 Nov 2021 21:17:38 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D102811

--- Comment #24 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Uros Bizjak <uros@gcc.gnu.org>:

https://gcc.gnu.org/g:ca5667e867252db3c8642ee90f55427149cd92b6

commit r12-5584-gca5667e867252db3c8642ee90f55427149cd92b6
Author: Uros Bizjak <ubizjak@gmail.com>
Date:   Mon Nov 29 22:16:12 2021 +0100

    i386: Fix and improve movhi_internal and movhf_internal some more.

    An (*v,C) alternative can be added to movhi_internal to directly load
    HImode constant 0 to xmm register. Also, V4SFmode moves can be used
    for xmm->xmm moves instead of TImode moves when optimizing for size.
    Fix invalid %vpinsrw insn template, which needs to duplicate %xmm
    register for AVX targets.

    Optimize GPR moves in movhf_internal in the same way as in movhi_intern=
al.
    Fix pinsrw and pextrw templates for AVX targets. Use sselog1
    instead of sselog type.  Also, handle TARGET_SSE_PARTIAL_REG_DEPENDENCY
    and TARGET_SSE_SPLIT_REGS targets.

    2021-11-29  Uro=C3=85=C2=A1 Bizjak  <ubizjak@gmail.com>

    gcc/ChangeLog:

            PR target/102811
            * config/i386/i386.md (*movhi_internal): Introduce (*v,C)
alternative.
            Do not allocate non-GPR registers.  Optimize xmm->xmm moves when
            optimizing for size.  Fix vpinsrw insn template.
            (*movhf_internal): Fix pinsrw and pextrw insn templates for
            AVX targets. Use sselog1 type instead of sselog.  Optimize GPR
moves.
            Optimize xmm->xmm moves for TARGET_SSE_PARTIAL_REG_DEPENDENCY
            and TARGET_SSE_SPLIT_REGS targets.=