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From: "crazylht at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/102834] gcc.target/i386/avx512f-pr96891-3.c FAILs
Date: Wed, 20 Oct 2021 01:14:07 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D102834

--- Comment #2 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to Rainer Orth from comment #1)
> Created attachment 51632 [details]
> 32-bit avx512f-pr96891-3.s

It relies on the existence of the pattern one_cmpldi2_doubleword, so that t=
he
avx512bw_cmpv64qi3 and one_cmpldi2_doubleword will be combined to
avx512bw_cmpv64qi3 w/ adjustment of imm operand, but on 32-bit Solaris/x86=
=20
one_cmpldi2_doubleword  is not existed.

(define_expand "one_cmpl<mode>2"
  [(set (match_operand:SWIM1248s 0 "nonimmediate_operand")
        (not:SWIM1248s (match_operand:SWIM1248s 1 "nonimmediate_operand")))]

(define_mode_iterator SWIM1248s
        [(QI "TARGET_QIMODE_MATH")
         (HI "TARGET_HIMODE_MATH")
         SI (DI "TARGET_64BIT || (TARGET_STV && TARGET_SSE2)")])

mstv
Target Mask(STV) Save
Disable Scalar to Vector optimization pass transforming 64-bit integer
computations into a vector ones.

Guess stv is disabled on on 32-bit Solaris/x86, if that, the fail should be
expected and xfail should be added for 32-bit Solaris/x86=