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Subject: [Bug rtl-optimization/102842] [10 Regression] ICE in
 cselib_record_set at -O2 or greater
Date: Tue, 26 Oct 2021 19:17:53 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D102842

--- Comment #13 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Vladimir Makarov <vmakarov@gcc.gnu.or=
g>:

https://gcc.gnu.org/g:8c59f4118357789cfa8df2cf0d3ecb61be7e9041

commit r12-4721-g8c59f4118357789cfa8df2cf0d3ecb61be7e9041
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date:   Tue Oct 26 14:03:42 2021 -0400

    [PR102842] Consider all outputs in generation of matching reloads

    Without considering all output insn operands (not only processed
    before), in rare cases LRA can use the same hard register for
    different outputs of the insn on different assignment subpasses.  The
    patch fixes the problem.

    gcc/ChangeLog:

            PR rtl-optimization/102842
            * lra-constraints.c (match_reload): Ignore out in checking valu=
es
            of outs.
            (curr_insn_transform): Collect outputs before doing reloads of
operands.

    gcc/testsuite/ChangeLog:

            PR rtl-optimization/102842
            * g++.target/arm/pr102842.C: New test.=