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From: "jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug rtl-optimization/103006] [9/10/11/12 Regression] wrong code at
 -O1 or -O2 on x86_64-linux-gnu by r7-7101
Date: Mon, 01 Nov 2021 11:29:50 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103006

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |rguenth at gcc dot gnu.org

--- Comment #5 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
What we see is an effect of 3 different optimizations, one is loop unrolling
(cunroll in this case), another one is ivopts that moves the h array refere=
nces
out of the loops but still has separate:
  ivtmp.40_47 =3D (unsigned long) &h;
  _17 =3D (unsigned long) &h;
  _30 =3D _17 + 96;
...
  h =3D{v} {CLOBBER};
  ivtmp.30_33 =3D (unsigned long) &h;
  _41 =3D (unsigned long) &h;
  _36 =3D _41 + 96;
and finally dom3's VN which replaces ivtmp.30_33 initializer with ivtmp.40_=
47
and _36 with _30.
If what the cfg expand var partition code is as designed (I think other pas=
ses
do it too, e.g. compute_live_vars/live_vars_at_stmt relies on it too), then=
 we
need to somehow avoid VN of &var across var =3D{v} {CLOBBER} stmt, but it i=
sn't
really clear to me how.
Unless we change loop unrolling so that the different loop iterations if th=
ere
is a var clobber in the loop actually have different variables (the first
iteration the original var and other iterations that var's copies; perhaps =
only
for addressable vars?).  Then naturally VN couldn't merge those and the RTL
partitioning code could decide to put them into the same or different parti=
tion
and later RTL opts could CSE the addresses.=