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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/103218] New: (a < 0) << signbit is not always
 optimized to a & signbitmask at the gimple level
Date: Sat, 13 Nov 2021 01:40:38 +0000
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X-Bugzilla-Component: tree-optimization
X-Bugzilla-Version: 12.0
X-Bugzilla-Keywords: missed-optimization, TREE
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103218

            Bug ID: 103218
           Summary: (a < 0) << signbit is not always optimized to a &
                    signbitmask at the gimple level
           Product: gcc
           Version: 12.0
            Status: UNCONFIRMED
          Keywords: missed-optimization, TREE
          Severity: enhancement
          Priority: P3
         Component: tree-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: pinskia at gcc dot gnu.org
  Target Milestone: ---

Take:
int f(signed char a)
{
  signed char t =3D a < 0;
  return (unsigned char)(t << 7);
}

At the gimple level we get:
int f(signed char a)
{
  signed char t =3D a < 0;
  return (unsigned char)(t << 7);
}
But combine is able to it:
Trying 9 -> 10:
    9: {r89:QI=3Dr91:SI#0 0>>0x7;clobber flags:CC;}
      REG_DEAD r91:SI
      REG_UNUSED flags:CC
   10: {r90:QI=3Dr89:QI<<0x7;clobber flags:CC;}
      REG_DEAD r89:QI
      REG_UNUSED flags:CC
Successfully matched this instruction:
(parallel [
        (set (reg:QI 90)
            (and:QI (subreg:QI (reg:SI 91) 0)
                (const_int -128 [0xffffffffffffff80])))
        (clobber (reg:CC 17 flags))
    ])
allowing combination of insns 9 and 10
original costs 4 + 4 =3D 8
replacement cost 4
deferring deletion of insn with uid =3D 9.
modifying insn i3    10: {r90:QI=3Dr91:SI#0&0xffffffffffffff80;clobber flag=
s:CC;}
      REG_DEAD r91:SI
      REG_UNUSED flags:CC
deferring rescan insn with uid =3D 10.

If we had wrote the testcase like:
int f(signed char a)
{
  return (a < 0) << 7;
}

GCC does optimize it to:
(int) NON_LVALUE_EXPR <a> & 128=