From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 28C9E3858433; Mon, 15 Nov 2021 17:59:32 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 28C9E3858433 From: "pinskia at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/103252] questionable codegen with kmovd Date: Mon, 15 Nov 2021 17:59:31 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 11.2.0 X-Bugzilla-Keywords: missed-optimization, ra X-Bugzilla-Severity: normal X-Bugzilla-Who: pinskia at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Nov 2021 17:59:32 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103252 --- Comment #4 from Andrew Pinski --- (In reply to Jason A. Donenfeld from comment #2) > Here's a more minimal test case: https://gcc.godbolt.org/z/15hnsb6of kmovd k0, ecx mov ecx, DWORD PTR __libc_tsd_CTYPE_B@gotntpoff[ebx] kmovd eax, k0 mov ecx, DWORD PTR gs:[ecx] test BYTE PTR 1[ecx+eax*2], 32 vs: mov ecx, DWORD PTR __libc_tsd_CTYPE_B@gotntpoff[ebx] mov ecx, DWORD PTR gs:[ecx] test BYTE PTR 1[ecx+edx*2], 32 Maybe it could have directly used eax in the first instruction but other th= an that, I don't see any issue with this code generation.=20 Before RA: (insn 162 161 163 15 (set (reg:SI 130 [ c ]) (sign_extend:SI (reg/v:QI 104 [ c ]))) "/app/example.c":81:68 156 {extendqisi2} (expr_list:REG_DEAD (reg/v:QI 104 [ c ]) (nil))) (insn 163 162 273 15 (set (reg:SI 132) (mem/u/c:SI (plus:SI (reg:SI 82) (const:SI (unspec:SI [ (symbol_ref:SI ("__libc_tsd_CTYPE_B") [flags 0x= 60]=20 ) ] UNSPEC_GOTNTPOFF))) [7 S4 A8])) "/app/example.c":81:67 77 {*movsi_internal} (expr_list:REG_EQUIV (mem/u/c:SI (plus:SI (reg:SI 82) (const:SI (unspec:SI [ (symbol_ref:SI ("__libc_tsd_CTYPE_B") [flags 0x= 60]=20 ) ] UNSPEC_GOTNTPOFF))) [7 S4 A8]) (nil))) (insn 273 163 165 15 (set (reg/f:SI 131 [ __libc_tsd_CTYPE_B ]) (mem/f/c:SI (reg:SI 132) [4 __libc_tsd_CTYPE_B+0 S4 A32 AS2])) "/app/example.c":81:67 77 {*movsi_internal} (expr_list:REG_DEAD (reg:SI 132) (nil))) (note 165 273 166 15 NOTE_INSN_DELETED) (note 166 165 274 15 NOTE_INSN_DELETED) (insn 274 166 168 15 (set (reg:CCZ 17 flags) (compare:CCZ (and:QI (mem:QI (plus:SI (plus:SI (mult:SI (reg:SI 130= [ c ]) (const_int 2 [0x2])) (reg/f:SI 131 [ __libc_tsd_CTYPE_B ])) (const_int 1 [0x1])) [5 *_12+1 S1 A8]) (const_int 32 [0x20])) (const_int 0 [0]))) "/app/example.c":81:43 502 {*testqi_1_maybe= _si} (expr_list:REG_DEAD (reg/f:SI 131 [ __libc_tsd_CTYPE_B ]) (expr_list:REG_DEAD (reg:SI 130 [ c ]) (nil)))) After reload: (insn 162 161 298 16 (set (reg:SI 2 cx [orig:130 c ] [130]) (sign_extend:SI (reg/v:QI 2 cx [orig:104 c ] [104]))) "/app/example.c":81:68 156 {extendqisi2} (nil)) (insn 298 162 163 16 (set (reg:SI 68 k0 [orig:130 c ] [130]) (reg:SI 2 cx [orig:130 c ] [130])) "/app/example.c":81:68 77 {*movsi_internal} (nil)) (insn 163 298 273 16 (set (reg:SI 2 cx [132]) (mem/u/c:SI (plus:SI (reg:SI 3 bx [82]) (const:SI (unspec:SI [ (symbol_ref:SI ("__libc_tsd_CTYPE_B") [flags 0x= 60]=20 ) ] UNSPEC_GOTNTPOFF))) [7 S4 A8])) "/app/example.c":81:67 77 {*movsi_internal} (expr_list:REG_EQUIV (mem/u/c:SI (plus:SI (reg:SI 3 bx [82]) (const:SI (unspec:SI [ (symbol_ref:SI ("__libc_tsd_CTYPE_B") [flags 0x= 60]=20 ) ] UNSPEC_GOTNTPOFF))) [7 S4 A8]) (nil))) (insn 273 163 165 16 (set (reg/f:SI 2 cx [orig:131 __libc_tsd_CTYPE_B ] [13= 1]) (mem/f/c:SI (reg:SI 2 cx [132]) [4 __libc_tsd_CTYPE_B+0 S4 A32 AS2]= )) "/app/example.c":81:67 77 {*movsi_internal} (nil)) (note 165 273 166 16 NOTE_INSN_DELETED) (note 166 165 299 16 NOTE_INSN_DELETED) (insn 299 166 274 16 (set (reg:SI 0 ax [orig:130 c ] [130]) (reg:SI 68 k0 [orig:130 c ] [130])) "/app/example.c":81:43 77 {*movsi_internal} (nil)) (insn 274 299 168 16 (set (reg:CCZ 17 flags) (compare:CCZ (and:QI (mem:QI (plus:SI (plus:SI (mult:SI (reg:SI 0 ax [orig:130 c ] [130]) (const_int 2 [0x2])) (reg/f:SI 2 cx [orig:131 __libc_tsd_CTYPE_B ] [131])) (const_int 1 [0x1])) [5 *_12+1 S1 A8]) (const_int 32 [0x20])) (const_int 0 [0]))) "/app/example.c":81:43 502 {*testqi_1_maybe= _si} (nil)) This is odd but not too bad really. It is definitely a register allocator issue but how bad is questionable. Register allocator will definitely do different choices if there are more register available which is what is happening in the AVX case. > And even smaller: https://gcc.godbolt.org/z/KG63ErzEr This one is fine/ok as GCC is using k0 as a spill register rather than spil= ling to memory. 32bit x86 has limited registers and all. There is nothing odd ab= out this one even. kmovd ecx, k0 vs mov ecx, DWORD PTR 4[esp]=